1af930827SMasahiro Yamada /* 2af930827SMasahiro Yamada * [origin: Linux kernel include/asm-arm/arch-at91/at91sam9rl.h] 3af930827SMasahiro Yamada * 4af930827SMasahiro Yamada * Copyright (C) 2007 Atmel Corporation 5af930827SMasahiro Yamada * 6af930827SMasahiro Yamada * Common definitions. 7af930827SMasahiro Yamada * Based on AT91SAM9RL datasheet revision A. (Preliminary) 8af930827SMasahiro Yamada * 9af930827SMasahiro Yamada * This file is subject to the terms and conditions of the GNU General Public 10af930827SMasahiro Yamada * License. See the file COPYING in the main directory of this archive for 11af930827SMasahiro Yamada * more details. 12af930827SMasahiro Yamada */ 13af930827SMasahiro Yamada 14af930827SMasahiro Yamada #ifndef AT91SAM9RL_H 15af930827SMasahiro Yamada #define AT91SAM9RL_H 16af930827SMasahiro Yamada 17af930827SMasahiro Yamada /* 18af930827SMasahiro Yamada * defines to be used in other places 19af930827SMasahiro Yamada */ 20af930827SMasahiro Yamada #define CONFIG_AT91FAMILY /* it's a member of AT91 */ 21af930827SMasahiro Yamada 22af930827SMasahiro Yamada /* 23af930827SMasahiro Yamada * Peripheral identifiers/interrupts. 24af930827SMasahiro Yamada */ 25af930827SMasahiro Yamada #define ATMEL_ID_FIQ 0 /* Advanced Interrupt Controller (FIQ) */ 26af930827SMasahiro Yamada #define ATMEL_ID_SYS 1 /* System Peripherals */ 27af930827SMasahiro Yamada #define ATMEL_ID_PIOA 2 /* Parallel IO Controller A */ 28af930827SMasahiro Yamada #define ATMEL_ID_PIOB 3 /* Parallel IO Controller B */ 29af930827SMasahiro Yamada #define ATMEL_ID_PIOC 4 /* Parallel IO Controller C */ 30af930827SMasahiro Yamada #define ATMEL_ID_PIOD 5 /* Parallel IO Controller D */ 31af930827SMasahiro Yamada #define ATMEL_ID_USART0 6 /* USART 0 */ 32af930827SMasahiro Yamada #define ATMEL_ID_USART1 7 /* USART 1 */ 33af930827SMasahiro Yamada #define ATMEL_ID_USART2 8 /* USART 2 */ 34af930827SMasahiro Yamada #define ATMEL_ID_USART3 9 /* USART 3 */ 35af930827SMasahiro Yamada #define ATMEL_ID_MCI 10 /* Multimedia Card Interface */ 36af930827SMasahiro Yamada #define ATMEL_ID_TWI0 11 /* TWI 0 */ 37af930827SMasahiro Yamada #define ATMEL_ID_TWI1 12 /* TWI 1 */ 38af930827SMasahiro Yamada #define ATMEL_ID_SPI 13 /* Serial Peripheral Interface */ 39af930827SMasahiro Yamada #define ATMEL_ID_SSC0 14 /* Serial Synchronous Controller 0 */ 40af930827SMasahiro Yamada #define ATMEL_ID_SSC1 15 /* Serial Synchronous Controller 1 */ 41af930827SMasahiro Yamada #define ATMEL_ID_TC0 16 /* Timer Counter 0 */ 42af930827SMasahiro Yamada #define ATMEL_ID_TC1 17 /* Timer Counter 1 */ 43af930827SMasahiro Yamada #define ATMEL_ID_TC2 18 /* Timer Counter 2 */ 44af930827SMasahiro Yamada #define ATMEL_ID_PWMC 19 /* Pulse Width Modulation Controller */ 45af930827SMasahiro Yamada #define ATMEL_ID_TSC 20 /* Touch Screen Controller */ 46af930827SMasahiro Yamada #define ATMEL_ID_DMA 21 /* DMA Controller */ 47af930827SMasahiro Yamada #define ATMEL_ID_UDPHS 22 /* USB Device HS */ 48af930827SMasahiro Yamada #define ATMEL_ID_LCDC 23 /* LCD Controller */ 49af930827SMasahiro Yamada #define ATMEL_ID_AC97C 24 /* AC97 Controller */ 50af930827SMasahiro Yamada #define ATMEL_ID_IRQ0 31 /* Advanced Interrupt Controller (IRQ0) */ 51af930827SMasahiro Yamada 52af930827SMasahiro Yamada /* 53af930827SMasahiro Yamada * User Peripheral physical base addresses. 54af930827SMasahiro Yamada */ 55af930827SMasahiro Yamada #define ATMEL_BASE_TCB0 0xfffa0000 56af930827SMasahiro Yamada #define ATMEL_BASE_TC0 0xfffa0000 57af930827SMasahiro Yamada #define ATMEL_BASE_TC1 0xfffa0040 58af930827SMasahiro Yamada #define ATMEL_BASE_TC2 0xfffa0080 59af930827SMasahiro Yamada #define ATMEL_BASE_MCI 0xfffa4000 60af930827SMasahiro Yamada #define ATMEL_BASE_TWI0 0xfffa8000 61af930827SMasahiro Yamada #define ATMEL_BASE_TWI1 0xfffac000 62af930827SMasahiro Yamada #define ATMEL_BASE_USART0 0xfffb0000 63af930827SMasahiro Yamada #define ATMEL_BASE_USART1 0xfffb4000 64af930827SMasahiro Yamada #define ATMEL_BASE_USART2 0xfffb8000 65af930827SMasahiro Yamada #define ATMEL_BASE_USART3 0xfffbc000 66af930827SMasahiro Yamada #define ATMEL_BASE_SSC0 0xfffc0000 67af930827SMasahiro Yamada #define ATMEL_BASE_SSC1 0xfffc4000 68af930827SMasahiro Yamada #define ATMEL_BASE_PWMC 0xfffc8000 69af930827SMasahiro Yamada #define ATMEL_BASE_SPI0 0xfffcc000 70af930827SMasahiro Yamada #define ATMEL_BASE_TSC 0xfffd0000 71af930827SMasahiro Yamada #define ATMEL_BASE_UDPHS 0xfffd4000 72af930827SMasahiro Yamada #define ATMEL_BASE_AC97C 0xfffd8000 73af930827SMasahiro Yamada #define ATMEL_BASE_SYS 0xffffc000 74af930827SMasahiro Yamada 75af930827SMasahiro Yamada /* 76af930827SMasahiro Yamada * System Peripherals 77af930827SMasahiro Yamada */ 78af930827SMasahiro Yamada #define ATMEL_BASE_DMA 0xffffe600 79af930827SMasahiro Yamada #define ATMEL_BASE_ECC 0xffffe800 80af930827SMasahiro Yamada #define ATMEL_BASE_SDRAMC 0xffffea00 81af930827SMasahiro Yamada #define ATMEL_BASE_SMC 0xffffec00 82af930827SMasahiro Yamada #define ATMEL_BASE_MATRIX 0xffffee00 83af930827SMasahiro Yamada #define ATMEL_BASE_CCFG 0xffffef10 84af930827SMasahiro Yamada #define ATMEL_BASE_AIC 0xfffff000 85af930827SMasahiro Yamada #define ATMEL_BASE_DBGU 0xfffff200 86af930827SMasahiro Yamada #define ATMEL_BASE_PIOA 0xfffff400 87af930827SMasahiro Yamada #define ATMEL_BASE_PIOB 0xfffff600 88af930827SMasahiro Yamada #define ATMEL_BASE_PIOC 0xfffff800 89af930827SMasahiro Yamada #define ATMEL_BASE_PIOD 0xfffffa00 90af930827SMasahiro Yamada #define ATMEL_BASE_PMC 0xfffffc00 91af930827SMasahiro Yamada #define ATMEL_BASE_RSTC 0xfffffd00 92af930827SMasahiro Yamada #define ATMEL_BASE_SHDWC 0xfffffd10 93af930827SMasahiro Yamada #define ATMEL_BASE_RTT 0xfffffd20 94af930827SMasahiro Yamada #define ATMEL_BASE_PIT 0xfffffd30 95af930827SMasahiro Yamada #define ATMEL_BASE_WDT 0xfffffd40 96af930827SMasahiro Yamada #define ATMEL_BASE_SCKCR 0xfffffd50 97af930827SMasahiro Yamada #define ATMEL_BASE_GPBR 0xfffffd60 98af930827SMasahiro Yamada #define ATMEL_BASE_RTC 0xfffffe00 99af930827SMasahiro Yamada 100af930827SMasahiro Yamada /* 101af930827SMasahiro Yamada * Internal Memory. 102af930827SMasahiro Yamada */ 103af930827SMasahiro Yamada #define ATMEL_BASE_SRAM 0x00300000 /* Internal SRAM base address */ 104af930827SMasahiro Yamada #define ATMEL_BASE_ROM 0x00400000 /* Internal ROM base address */ 105af930827SMasahiro Yamada 106af930827SMasahiro Yamada #define ATMEL_BASE_LCDC 0x00500000 /* LCD Controller */ 107af930827SMasahiro Yamada #define ATMEL_UHP_BASE 0x00600000 /* USB Device HS controller */ 108af930827SMasahiro Yamada 109af930827SMasahiro Yamada /* 110af930827SMasahiro Yamada * External memory 111af930827SMasahiro Yamada */ 112af930827SMasahiro Yamada #define ATMEL_BASE_CS0 0x10000000 113af930827SMasahiro Yamada #define ATMEL_BASE_CS1 0x20000000 /* SDRAM */ 114af930827SMasahiro Yamada #define ATMEL_BASE_CS2 0x30000000 115af930827SMasahiro Yamada #define ATMEL_BASE_CS3 0x40000000 /* NAND */ 116af930827SMasahiro Yamada #define ATMEL_BASE_CS4 0x50000000 /* Compact Flash Slot 0 */ 117af930827SMasahiro Yamada #define ATMEL_BASE_CS5 0x60000000 /* Compact Flash Slot 1 */ 118af930827SMasahiro Yamada 119*a02c8a31SBo Shen /* Timer */ 120*a02c8a31SBo Shen #define CONFIG_SYS_TIMER_COUNTER 0xfffffd3c 121*a02c8a31SBo Shen 122af930827SMasahiro Yamada /* 123af930827SMasahiro Yamada * Other misc defines 124af930827SMasahiro Yamada */ 125af930827SMasahiro Yamada #define ATMEL_PIO_PORTS 4 /* this SoC has 4 PIO */ 126af930827SMasahiro Yamada #define ATMEL_BASE_PIO ATMEL_BASE_PIOA 127af930827SMasahiro Yamada 128af930827SMasahiro Yamada /* 129af930827SMasahiro Yamada * Cpu Name 130af930827SMasahiro Yamada */ 131af930827SMasahiro Yamada #define ATMEL_CPU_NAME "AT91SAM9RL" 132af930827SMasahiro Yamada 133af930827SMasahiro Yamada #endif 134