1*af930827SMasahiro Yamada /* 2*af930827SMasahiro Yamada * [origin: Linux kernel include/asm-arm/arch-at91/at91sam9_smc.h] 3*af930827SMasahiro Yamada * 4*af930827SMasahiro Yamada * Copyright (C) 2007 Andrew Victor 5*af930827SMasahiro Yamada * Copyright (C) 2007 Atmel Corporation. 6*af930827SMasahiro Yamada * 7*af930827SMasahiro Yamada * Static Memory Controllers (SMC) - System peripherals registers. 8*af930827SMasahiro Yamada * Based on AT91SAM9261 datasheet revision D. 9*af930827SMasahiro Yamada * 10*af930827SMasahiro Yamada * SPDX-License-Identifier: GPL-2.0+ 11*af930827SMasahiro Yamada */ 12*af930827SMasahiro Yamada 13*af930827SMasahiro Yamada #ifndef AT91SAM9_SMC_H 14*af930827SMasahiro Yamada #define AT91SAM9_SMC_H 15*af930827SMasahiro Yamada 16*af930827SMasahiro Yamada #ifdef __ASSEMBLY__ 17*af930827SMasahiro Yamada 18*af930827SMasahiro Yamada #ifndef ATMEL_BASE_SMC 19*af930827SMasahiro Yamada #define ATMEL_BASE_SMC ATMEL_BASE_SMC0 20*af930827SMasahiro Yamada #endif 21*af930827SMasahiro Yamada 22*af930827SMasahiro Yamada #define AT91_ASM_SMC_SETUP0 ATMEL_BASE_SMC 23*af930827SMasahiro Yamada #define AT91_ASM_SMC_PULSE0 (ATMEL_BASE_SMC + 0x04) 24*af930827SMasahiro Yamada #define AT91_ASM_SMC_CYCLE0 (ATMEL_BASE_SMC + 0x08) 25*af930827SMasahiro Yamada #define AT91_ASM_SMC_MODE0 (ATMEL_BASE_SMC + 0x0C) 26*af930827SMasahiro Yamada 27*af930827SMasahiro Yamada #else 28*af930827SMasahiro Yamada 29*af930827SMasahiro Yamada typedef struct at91_cs { 30*af930827SMasahiro Yamada u32 setup; /* 0x00 SMC Setup Register */ 31*af930827SMasahiro Yamada u32 pulse; /* 0x04 SMC Pulse Register */ 32*af930827SMasahiro Yamada u32 cycle; /* 0x08 SMC Cycle Register */ 33*af930827SMasahiro Yamada u32 mode; /* 0x0C SMC Mode Register */ 34*af930827SMasahiro Yamada } at91_cs_t; 35*af930827SMasahiro Yamada 36*af930827SMasahiro Yamada typedef struct at91_smc { 37*af930827SMasahiro Yamada at91_cs_t cs[8]; 38*af930827SMasahiro Yamada } at91_smc_t; 39*af930827SMasahiro Yamada 40*af930827SMasahiro Yamada #endif /* __ASSEMBLY__ */ 41*af930827SMasahiro Yamada 42*af930827SMasahiro Yamada #define AT91_SMC_SETUP_NWE(x) (x & 0x3f) 43*af930827SMasahiro Yamada #define AT91_SMC_SETUP_NCS_WR(x) ((x & 0x3f) << 8) 44*af930827SMasahiro Yamada #define AT91_SMC_SETUP_NRD(x) ((x & 0x3f) << 16) 45*af930827SMasahiro Yamada #define AT91_SMC_SETUP_NCS_RD(x) ((x & 0x3f) << 24) 46*af930827SMasahiro Yamada 47*af930827SMasahiro Yamada #define AT91_SMC_PULSE_NWE(x) (x & 0x7f) 48*af930827SMasahiro Yamada #define AT91_SMC_PULSE_NCS_WR(x) ((x & 0x7f) << 8) 49*af930827SMasahiro Yamada #define AT91_SMC_PULSE_NRD(x) ((x & 0x7f) << 16) 50*af930827SMasahiro Yamada #define AT91_SMC_PULSE_NCS_RD(x) ((x & 0x7f) << 24) 51*af930827SMasahiro Yamada 52*af930827SMasahiro Yamada #define AT91_SMC_CYCLE_NWE(x) (x & 0x1ff) 53*af930827SMasahiro Yamada #define AT91_SMC_CYCLE_NRD(x) ((x & 0x1ff) << 16) 54*af930827SMasahiro Yamada 55*af930827SMasahiro Yamada #define AT91_SMC_MODE_RM_NCS 0x00000000 56*af930827SMasahiro Yamada #define AT91_SMC_MODE_RM_NRD 0x00000001 57*af930827SMasahiro Yamada #define AT91_SMC_MODE_WM_NCS 0x00000000 58*af930827SMasahiro Yamada #define AT91_SMC_MODE_WM_NWE 0x00000002 59*af930827SMasahiro Yamada 60*af930827SMasahiro Yamada #define AT91_SMC_MODE_EXNW_DISABLE 0x00000000 61*af930827SMasahiro Yamada #define AT91_SMC_MODE_EXNW_FROZEN 0x00000020 62*af930827SMasahiro Yamada #define AT91_SMC_MODE_EXNW_READY 0x00000030 63*af930827SMasahiro Yamada 64*af930827SMasahiro Yamada #define AT91_SMC_MODE_BAT 0x00000100 65*af930827SMasahiro Yamada #define AT91_SMC_MODE_DBW_8 0x00000000 66*af930827SMasahiro Yamada #define AT91_SMC_MODE_DBW_16 0x00001000 67*af930827SMasahiro Yamada #define AT91_SMC_MODE_DBW_32 0x00002000 68*af930827SMasahiro Yamada #define AT91_SMC_MODE_TDF_CYCLE(x) ((x & 0xf) << 16) 69*af930827SMasahiro Yamada #define AT91_SMC_MODE_TDF 0x00100000 70*af930827SMasahiro Yamada #define AT91_SMC_MODE_PMEN 0x01000000 71*af930827SMasahiro Yamada #define AT91_SMC_MODE_PS_4 0x00000000 72*af930827SMasahiro Yamada #define AT91_SMC_MODE_PS_8 0x10000000 73*af930827SMasahiro Yamada #define AT91_SMC_MODE_PS_16 0x20000000 74*af930827SMasahiro Yamada #define AT91_SMC_MODE_PS_32 0x30000000 75*af930827SMasahiro Yamada 76*af930827SMasahiro Yamada #endif 77