1*90958466SAndre Renaud /* 2*90958466SAndre Renaud * Copyright (C) 2016 Google, Inc 3*90958466SAndre Renaud * Written by Simon Glass <sjg@chromium.org> 4*90958466SAndre Renaud * 5*90958466SAndre Renaud * SPDX-License-Identifier: GPL-2.0+ 6*90958466SAndre Renaud */ 7*90958466SAndre Renaud 8*90958466SAndre Renaud #ifndef AT91_SCK_H 9*90958466SAndre Renaud #define AT91_SCK_H 10*90958466SAndre Renaud 11*90958466SAndre Renaud /* 12*90958466SAndre Renaud * SCKCR flags 13*90958466SAndre Renaud */ 14*90958466SAndre Renaud #define AT91SAM9G45_SCKCR_RCEN (1 << 0) /* RC Oscillator Enable */ 15*90958466SAndre Renaud #define AT91SAM9G45_SCKCR_OSC32EN (1 << 1) /* 32kHz Oscillator Enable */ 16*90958466SAndre Renaud #define AT91SAM9G45_SCKCR_OSC32BYP (1 << 2) /* 32kHz Oscillator Bypass */ 17*90958466SAndre Renaud #define AT91SAM9G45_SCKCR_OSCSEL (1 << 3) /* Slow Clock Selector */ 18*90958466SAndre Renaud #define AT91SAM9G45_SCKCR_OSCSEL_RC (0 << 3) 19*90958466SAndre Renaud #define AT91SAM9G45_SCKCR_OSCSEL_32 (1 << 3) 20*90958466SAndre Renaud 21*90958466SAndre Renaud #endif 22