xref: /rk3399_rockchip-uboot/arch/arm/mach-at91/include/mach/at91_rtt.h (revision b9cb64825b5e6efeb715abd8b48d9b12f98973e9)
1*af930827SMasahiro Yamada /*
2*af930827SMasahiro Yamada  * Copyright (C) 2010
3*af930827SMasahiro Yamada  * Reinhard Meyer, reinhard.meyer@emk-elektronik.de
4*af930827SMasahiro Yamada  *
5*af930827SMasahiro Yamada  * Real-time Timer
6*af930827SMasahiro Yamada  * Based on AT91SAM9XE datasheet
7*af930827SMasahiro Yamada  *
8*af930827SMasahiro Yamada  * SPDX-License-Identifier:	GPL-2.0+
9*af930827SMasahiro Yamada  */
10*af930827SMasahiro Yamada 
11*af930827SMasahiro Yamada #ifndef AT91_RTT_H
12*af930827SMasahiro Yamada #define AT91_RTT_H
13*af930827SMasahiro Yamada 
14*af930827SMasahiro Yamada #ifndef __ASSEMBLY__
15*af930827SMasahiro Yamada 
16*af930827SMasahiro Yamada typedef struct at91_rtt {
17*af930827SMasahiro Yamada 	u32	mr;	/* Mode Register   RW 0x00008000 */
18*af930827SMasahiro Yamada 	u32	ar;	/* Alarm Register  RW 0xFFFFFFFF */
19*af930827SMasahiro Yamada 	u32	vr;	/* Value Register  RO 0x00000000 */
20*af930827SMasahiro Yamada 	u32	sr;	/* Status Register RO 0x00000000 */
21*af930827SMasahiro Yamada } at91_rtt_t;
22*af930827SMasahiro Yamada 
23*af930827SMasahiro Yamada #endif /* __ASSEMBLY__ */
24*af930827SMasahiro Yamada 
25*af930827SMasahiro Yamada #define AT91_RTT_MR_RTPRES	0x0000ffff
26*af930827SMasahiro Yamada #define AT91_RTT_MR_ALMIEN	0x00010000
27*af930827SMasahiro Yamada #define AT91_RTT_RTTINCIEN	0x00020000
28*af930827SMasahiro Yamada #define AT91_RTT_RTTRST	0x00040000
29*af930827SMasahiro Yamada 
30*af930827SMasahiro Yamada #define AT91_RTT_SR_ALMS	0x00000001
31*af930827SMasahiro Yamada #define AT91_RTT_SR_RTTINC	0x00000002
32*af930827SMasahiro Yamada 
33*af930827SMasahiro Yamada #endif
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