1*01648f32SAndre Renaud /* 2*01648f32SAndre Renaud * Copyright (C) 2005 Ivan Kokshaysky 3*01648f32SAndre Renaud * Copyright (C) SAN People 4*01648f32SAndre Renaud * 5*01648f32SAndre Renaud * Real Time Clock (RTC) - System peripheral registers. 6*01648f32SAndre Renaud * Based on AT91RM9200 datasheet revision E. 7*01648f32SAndre Renaud * 8*01648f32SAndre Renaud * SPDX-License-Identifier: GPL-2.0+ 9*01648f32SAndre Renaud */ 10*01648f32SAndre Renaud 11*01648f32SAndre Renaud #ifndef AT91_RTC_H 12*01648f32SAndre Renaud #define AT91_RTC_H 13*01648f32SAndre Renaud 14*01648f32SAndre Renaud /* Control Register */ 15*01648f32SAndre Renaud #define AT91_RTC_CR (ATMEL_BASE_RTC + 0x00) 16*01648f32SAndre Renaud #define AT91_RTC_UPDTIM (1 << 0) /* Update Request Time */ 17*01648f32SAndre Renaud #define AT91_RTC_UPDCAL (1 << 1) /* Update Request Calendar */ 18*01648f32SAndre Renaud #define AT91_RTC_TIMEVSEL (3 << 8) /* Time Event Selection */ 19*01648f32SAndre Renaud #define AT91_RTC_TIMEVSEL_MINUTE (0 << 8) 20*01648f32SAndre Renaud #define AT91_RTC_TIMEVSEL_HOUR (1 << 8) 21*01648f32SAndre Renaud #define AT91_RTC_TIMEVSEL_DAY24 (2 << 8) 22*01648f32SAndre Renaud #define AT91_RTC_TIMEVSEL_DAY12 (3 << 8) 23*01648f32SAndre Renaud #define AT91_RTC_CALEVSEL (3 << 16) /* Calendar Event Selection */ 24*01648f32SAndre Renaud #define AT91_RTC_CALEVSEL_WEEK (0 << 16) 25*01648f32SAndre Renaud #define AT91_RTC_CALEVSEL_MONTH (1 << 16) 26*01648f32SAndre Renaud #define AT91_RTC_CALEVSEL_YEAR (2 << 16) 27*01648f32SAndre Renaud 28*01648f32SAndre Renaud #define AT91_RTC_MR (ATMEL_BASE_RTC + 0x04) /* Mode Register */ 29*01648f32SAndre Renaud #define AT91_RTC_HRMOD (1 << 0) /* 12/24 Hour Mode */ 30*01648f32SAndre Renaud 31*01648f32SAndre Renaud #define AT91_RTC_TIMR (ATMEL_BASE_RTC + 0x08) /* Time Register */ 32*01648f32SAndre Renaud #define AT91_RTC_SEC (0x7f << 0) /* Current Second */ 33*01648f32SAndre Renaud #define AT91_RTC_MIN (0x7f << 8) /* Current Minute */ 34*01648f32SAndre Renaud #define AT91_RTC_HOUR (0x3f << 16) /* Current Hour */ 35*01648f32SAndre Renaud #define AT91_RTC_AMPM (1 << 22) /* AM/PM */ 36*01648f32SAndre Renaud 37*01648f32SAndre Renaud #define AT91_RTC_CALR (ATMEL_BASE_RTC + 0x0c) /* Calendar Register */ 38*01648f32SAndre Renaud #define AT91_RTC_CENT (0x7f << 0) /* Current Century */ 39*01648f32SAndre Renaud #define AT91_RTC_YEAR (0xff << 8) /* Current Year */ 40*01648f32SAndre Renaud #define AT91_RTC_MONTH (0x1f << 16) /* Current Month */ 41*01648f32SAndre Renaud #define AT91_RTC_DAY (7 << 21) /* Current Day */ 42*01648f32SAndre Renaud #define AT91_RTC_DATE (0x3f << 24) /* Current Date */ 43*01648f32SAndre Renaud 44*01648f32SAndre Renaud #define AT91_RTC_TIMALR (ATMEL_BASE_RTC + 0x10) /* Time Alarm */ 45*01648f32SAndre Renaud #define AT91_RTC_SECEN (1 << 7) /* Second Alarm Enab */ 46*01648f32SAndre Renaud #define AT91_RTC_MINEN (1 << 15) /* Minute Alarm Enab */ 47*01648f32SAndre Renaud #define AT91_RTC_HOUREN (1 << 23) /* Hour Alarm Enable */ 48*01648f32SAndre Renaud 49*01648f32SAndre Renaud #define AT91_RTC_CALALR (ATMEL_BASE_RTC + 0x14) /* Calendar Alarm */ 50*01648f32SAndre Renaud #define AT91_RTC_MTHEN (1 << 23) /* Month Alarm Enable */ 51*01648f32SAndre Renaud #define AT91_RTC_DATEEN (1 << 31) /* Date Alarm Enable */ 52*01648f32SAndre Renaud 53*01648f32SAndre Renaud #define AT91_RTC_SR (ATMEL_BASE_RTC + 0x18) /* Status Register */ 54*01648f32SAndre Renaud #define AT91_RTC_ACKUPD (1 << 0) /* Ack for Update */ 55*01648f32SAndre Renaud #define AT91_RTC_ALARM (1 << 1) /* Alarm Flag */ 56*01648f32SAndre Renaud #define AT91_RTC_SECEV (1 << 2) /* Second Event */ 57*01648f32SAndre Renaud #define AT91_RTC_TIMEV (1 << 3) /* Time Event */ 58*01648f32SAndre Renaud #define AT91_RTC_CALEV (1 << 4) /* Calendar Event */ 59*01648f32SAndre Renaud 60*01648f32SAndre Renaud #define AT91_RTC_SCCR (ATMEL_BASE_RTC + 0x1c) /* Status Clear Cmd */ 61*01648f32SAndre Renaud #define AT91_RTC_IER (ATMEL_BASE_RTC + 0x20) /* Interrupt Enable */ 62*01648f32SAndre Renaud #define AT91_RTC_IDR (ATMEL_BASE_RTC + 0x24) /* Interrupt Disable */ 63*01648f32SAndre Renaud #define AT91_RTC_IMR (ATMEL_BASE_RTC + 0x28) /* Interrupt Mask */ 64*01648f32SAndre Renaud 65*01648f32SAndre Renaud #define AT91_RTC_VER (ATMEL_BASE_RTC + 0x2c) /* Valid Entry */ 66*01648f32SAndre Renaud #define AT91_RTC_NVTIM (1 << 0) /* Non-valid Time */ 67*01648f32SAndre Renaud #define AT91_RTC_NVCAL (1 << 1) /* Non-valid Calendar */ 68*01648f32SAndre Renaud #define AT91_RTC_NVTIMALR (1 << 2) /* .. Time Alarm */ 69*01648f32SAndre Renaud #define AT91_RTC_NVCALALR (1 << 3) /* .. Calendar Alarm */ 70*01648f32SAndre Renaud 71*01648f32SAndre Renaud #endif 72