1*af930827SMasahiro Yamada /* 2*af930827SMasahiro Yamada * Copyright (C) 2009 Jens Scharsig (js_at_ng@scharsoft.de) 3*af930827SMasahiro Yamada * 4*af930827SMasahiro Yamada * based on AT91RM9200 datasheet revision I (36. Ethernet MAC (EMAC)) 5*af930827SMasahiro Yamada * 6*af930827SMasahiro Yamada * SPDX-License-Identifier: GPL-2.0+ 7*af930827SMasahiro Yamada */ 8*af930827SMasahiro Yamada 9*af930827SMasahiro Yamada #ifndef AT91_H 10*af930827SMasahiro Yamada #define AT91_H 11*af930827SMasahiro Yamada 12*af930827SMasahiro Yamada typedef struct at91_emac { 13*af930827SMasahiro Yamada u32 ctl; 14*af930827SMasahiro Yamada u32 cfg; 15*af930827SMasahiro Yamada u32 sr; 16*af930827SMasahiro Yamada u32 tar; 17*af930827SMasahiro Yamada u32 tcr; 18*af930827SMasahiro Yamada u32 tsr; 19*af930827SMasahiro Yamada u32 rbqp; 20*af930827SMasahiro Yamada u32 reserved0; 21*af930827SMasahiro Yamada u32 rsr; 22*af930827SMasahiro Yamada u32 isr; 23*af930827SMasahiro Yamada u32 ier; 24*af930827SMasahiro Yamada u32 idr; 25*af930827SMasahiro Yamada u32 imr; 26*af930827SMasahiro Yamada u32 man; 27*af930827SMasahiro Yamada u32 reserved1[2]; 28*af930827SMasahiro Yamada u32 fra; 29*af930827SMasahiro Yamada u32 scol; 30*af930827SMasahiro Yamada u32 mocl; 31*af930827SMasahiro Yamada u32 ok; 32*af930827SMasahiro Yamada u32 seqe; 33*af930827SMasahiro Yamada u32 ale; 34*af930827SMasahiro Yamada u32 dte; 35*af930827SMasahiro Yamada u32 lcol; 36*af930827SMasahiro Yamada u32 ecol; 37*af930827SMasahiro Yamada u32 cse; 38*af930827SMasahiro Yamada u32 tue; 39*af930827SMasahiro Yamada u32 cde; 40*af930827SMasahiro Yamada u32 elr; 41*af930827SMasahiro Yamada u32 rjb; 42*af930827SMasahiro Yamada u32 usf; 43*af930827SMasahiro Yamada u32 sqee; 44*af930827SMasahiro Yamada u32 drfc; 45*af930827SMasahiro Yamada u32 reserved2[3]; 46*af930827SMasahiro Yamada u32 hsh; 47*af930827SMasahiro Yamada u32 hsl; 48*af930827SMasahiro Yamada u32 sa1l; 49*af930827SMasahiro Yamada u32 sa1h; 50*af930827SMasahiro Yamada u32 sa2l; 51*af930827SMasahiro Yamada u32 sa2h; 52*af930827SMasahiro Yamada u32 sa3l; 53*af930827SMasahiro Yamada u32 sa3h; 54*af930827SMasahiro Yamada u32 sa4l; 55*af930827SMasahiro Yamada u32 sa4h; 56*af930827SMasahiro Yamada } at91_emac_t; 57*af930827SMasahiro Yamada 58*af930827SMasahiro Yamada #define AT91_EMAC_CTL_LB 0x0001 59*af930827SMasahiro Yamada #define AT91_EMAC_CTL_LBL 0x0002 60*af930827SMasahiro Yamada #define AT91_EMAC_CTL_RE 0x0004 61*af930827SMasahiro Yamada #define AT91_EMAC_CTL_TE 0x0008 62*af930827SMasahiro Yamada #define AT91_EMAC_CTL_MPE 0x0010 63*af930827SMasahiro Yamada #define AT91_EMAC_CTL_CSR 0x0020 64*af930827SMasahiro Yamada #define AT91_EMAC_CTL_ISR 0x0040 65*af930827SMasahiro Yamada #define AT91_EMAC_CTL_WES 0x0080 66*af930827SMasahiro Yamada #define AT91_EMAC_CTL_BP 0x1000 67*af930827SMasahiro Yamada 68*af930827SMasahiro Yamada #define AT91_EMAC_CFG_SPD 0x0001 69*af930827SMasahiro Yamada #define AT91_EMAC_CFG_FD 0x0002 70*af930827SMasahiro Yamada #define AT91_EMAC_CFG_BR 0x0004 71*af930827SMasahiro Yamada #define AT91_EMAC_CFG_CAF 0x0010 72*af930827SMasahiro Yamada #define AT91_EMAC_CFG_NBC 0x0020 73*af930827SMasahiro Yamada #define AT91_EMAC_CFG_MTI 0x0040 74*af930827SMasahiro Yamada #define AT91_EMAC_CFG_UNI 0x0080 75*af930827SMasahiro Yamada #define AT91_EMAC_CFG_BIG 0x0100 76*af930827SMasahiro Yamada #define AT91_EMAC_CFG_EAE 0x0200 77*af930827SMasahiro Yamada #define AT91_EMAC_CFG_CLK_MASK 0xFFFFF3FF 78*af930827SMasahiro Yamada #define AT91_EMAC_CFG_MCLK_8 0x0000 79*af930827SMasahiro Yamada #define AT91_EMAC_CFG_MCLK_16 0x0400 80*af930827SMasahiro Yamada #define AT91_EMAC_CFG_MCLK_32 0x0800 81*af930827SMasahiro Yamada #define AT91_EMAC_CFG_MCLK_64 0x0C00 82*af930827SMasahiro Yamada #define AT91_EMAC_CFG_RTY 0x1000 83*af930827SMasahiro Yamada #define AT91_EMAC_CFG_RMII 0x2000 84*af930827SMasahiro Yamada 85*af930827SMasahiro Yamada #define AT91_EMAC_SR_LINK 0x0001 86*af930827SMasahiro Yamada #define AT91_EMAC_SR_MDIO 0x0002 87*af930827SMasahiro Yamada #define AT91_EMAC_SR_IDLE 0x0004 88*af930827SMasahiro Yamada 89*af930827SMasahiro Yamada #define AT91_EMAC_TCR_LEN(x) (x & 0x7FF) 90*af930827SMasahiro Yamada #define AT91_EMAC_TCR_NCRC 0x8000 91*af930827SMasahiro Yamada 92*af930827SMasahiro Yamada #define AT91_EMAC_TSR_OVR 0x0001 93*af930827SMasahiro Yamada #define AT91_EMAC_TSR_COL 0x0002 94*af930827SMasahiro Yamada #define AT91_EMAC_TSR_RLE 0x0004 95*af930827SMasahiro Yamada #define AT91_EMAC_TSR_TXIDLE 0x0008 96*af930827SMasahiro Yamada #define AT91_EMAC_TSR_BNQ 0x0010 97*af930827SMasahiro Yamada #define AT91_EMAC_TSR_COMP 0x0020 98*af930827SMasahiro Yamada #define AT91_EMAC_TSR_UND 0x0040 99*af930827SMasahiro Yamada 100*af930827SMasahiro Yamada #define AT91_EMAC_RSR_BNA 0x0001 101*af930827SMasahiro Yamada #define AT91_EMAC_RSR_REC 0x0002 102*af930827SMasahiro Yamada #define AT91_EMAC_RSR_OVR 0x0004 103*af930827SMasahiro Yamada 104*af930827SMasahiro Yamada /* ISR, IER, IDR, IMR use the same bits */ 105*af930827SMasahiro Yamada #define AT91_EMAC_IxR_DONE 0x0001 106*af930827SMasahiro Yamada #define AT91_EMAC_IxR_RCOM 0x0002 107*af930827SMasahiro Yamada #define AT91_EMAC_IxR_RBNA 0x0004 108*af930827SMasahiro Yamada #define AT91_EMAC_IxR_TOVR 0x0008 109*af930827SMasahiro Yamada #define AT91_EMAC_IxR_TUND 0x0010 110*af930827SMasahiro Yamada #define AT91_EMAC_IxR_RTRY 0x0020 111*af930827SMasahiro Yamada #define AT91_EMAC_IxR_TBRE 0x0040 112*af930827SMasahiro Yamada #define AT91_EMAC_IxR_TCOM 0x0080 113*af930827SMasahiro Yamada #define AT91_EMAC_IxR_TIDLE 0x0100 114*af930827SMasahiro Yamada #define AT91_EMAC_IxR_LINK 0x0200 115*af930827SMasahiro Yamada #define AT91_EMAC_IxR_ROVR 0x0400 116*af930827SMasahiro Yamada #define AT91_EMAC_IxR_HRESP 0x0800 117*af930827SMasahiro Yamada 118*af930827SMasahiro Yamada #define AT91_EMAC_MAN_DATA_MASK 0xFFFF 119*af930827SMasahiro Yamada #define AT91_EMAC_MAN_CODE_802_3 0x00020000 120*af930827SMasahiro Yamada #define AT91_EMAC_MAN_REGA(reg) ((reg & 0x1F) << 18) 121*af930827SMasahiro Yamada #define AT91_EMAC_MAN_PHYA(phy) ((phy & 0x1F) << 23) 122*af930827SMasahiro Yamada #define AT91_EMAC_MAN_RW_R 0x20000000 123*af930827SMasahiro Yamada #define AT91_EMAC_MAN_RW_W 0x10000000 124*af930827SMasahiro Yamada #define AT91_EMAC_MAN_HIGH 0x40000000 125*af930827SMasahiro Yamada #define AT91_EMAC_MAN_LOW 0x80000000 126*af930827SMasahiro Yamada 127*af930827SMasahiro Yamada #endif 128