1*62011840SMasahiro Yamada /* 2*62011840SMasahiro Yamada * (C) Copyright 2007-2008 3*62011840SMasahiro Yamada * Stelian Pop <stelian@popies.net> 4*62011840SMasahiro Yamada * Lead Tech Design <www.leadtechdesign.com> 5*62011840SMasahiro Yamada * 6*62011840SMasahiro Yamada * (C) Copyright 2013 7*62011840SMasahiro Yamada * Bo Shen <voice.shen@atmel.com> 8*62011840SMasahiro Yamada * 9*62011840SMasahiro Yamada * SPDX-License-Identifier: GPL-2.0+ 10*62011840SMasahiro Yamada */ 11*62011840SMasahiro Yamada 12*62011840SMasahiro Yamada #include <common.h> 13*62011840SMasahiro Yamada #include <asm/io.h> 14*62011840SMasahiro Yamada #include <asm/arch/hardware.h> 15*62011840SMasahiro Yamada #include <asm/arch/at91_rstc.h> 16*62011840SMasahiro Yamada 17*62011840SMasahiro Yamada /* Reset the cpu by telling the reset controller to do so */ reset_cpu(ulong ignored)18*62011840SMasahiro Yamadavoid reset_cpu(ulong ignored) 19*62011840SMasahiro Yamada { 20*62011840SMasahiro Yamada at91_rstc_t *rstc = (at91_rstc_t *)ATMEL_BASE_RSTC; 21*62011840SMasahiro Yamada 22*62011840SMasahiro Yamada writel(AT91_RSTC_KEY 23*62011840SMasahiro Yamada | AT91_RSTC_CR_PROCRST /* Processor Reset */ 24*62011840SMasahiro Yamada | AT91_RSTC_CR_PERRST /* Peripheral Reset */ 25*62011840SMasahiro Yamada #ifdef CONFIG_AT91RESET_EXTRST 26*62011840SMasahiro Yamada | AT91_RSTC_CR_EXTRST /* External Reset (assert nRST pin) */ 27*62011840SMasahiro Yamada #endif 28*62011840SMasahiro Yamada , &rstc->cr); 29*62011840SMasahiro Yamada /* never reached */ 30*62011840SMasahiro Yamada do { } while (1); 31*62011840SMasahiro Yamada } 32