xref: /rk3399_rockchip-uboot/arch/arm/mach-at91/arm926ejs/reset.c (revision b9cb64825b5e6efeb715abd8b48d9b12f98973e9)
1*62011840SMasahiro Yamada /*
2*62011840SMasahiro Yamada  * (C) Copyright 2007-2008
3*62011840SMasahiro Yamada  * Stelian Pop <stelian@popies.net>
4*62011840SMasahiro Yamada  * Lead Tech Design <www.leadtechdesign.com>
5*62011840SMasahiro Yamada  *
6*62011840SMasahiro Yamada  * SPDX-License-Identifier:	GPL-2.0+
7*62011840SMasahiro Yamada  */
8*62011840SMasahiro Yamada 
9*62011840SMasahiro Yamada #include <common.h>
10*62011840SMasahiro Yamada #include <asm/io.h>
11*62011840SMasahiro Yamada #include <asm/arch/hardware.h>
12*62011840SMasahiro Yamada #include <asm/arch/at91_rstc.h>
13*62011840SMasahiro Yamada 
14*62011840SMasahiro Yamada /* Reset the cpu by telling the reset controller to do so */
reset_cpu(ulong ignored)15*62011840SMasahiro Yamada void reset_cpu(ulong ignored)
16*62011840SMasahiro Yamada {
17*62011840SMasahiro Yamada 	at91_rstc_t *rstc = (at91_rstc_t *) ATMEL_BASE_RSTC;
18*62011840SMasahiro Yamada 
19*62011840SMasahiro Yamada 	writel(AT91_RSTC_KEY
20*62011840SMasahiro Yamada 		| AT91_RSTC_CR_PROCRST	/* Processor Reset */
21*62011840SMasahiro Yamada 		| AT91_RSTC_CR_PERRST	/* Peripheral Reset */
22*62011840SMasahiro Yamada #ifdef CONFIG_AT91RESET_EXTRST
23*62011840SMasahiro Yamada 		| AT91_RSTC_CR_EXTRST	/* External Reset (assert nRST pin) */
24*62011840SMasahiro Yamada #endif
25*62011840SMasahiro Yamada 		, &rstc->cr);
26*62011840SMasahiro Yamada 	/* never reached */
27*62011840SMasahiro Yamada 	while (1)
28*62011840SMasahiro Yamada 		;
29*62011840SMasahiro Yamada }
30