1ea0364f1SPeter Tyser /* 2ea0364f1SPeter Tyser * (C) Copyright 2002 3ea0364f1SPeter Tyser * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 4ea0364f1SPeter Tyser * 51a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 6ea0364f1SPeter Tyser */ 7ea0364f1SPeter Tyser 8ea0364f1SPeter Tyser /* for now: just dummy functions to satisfy the linker */ 9ea0364f1SPeter Tyser 10ea0364f1SPeter Tyser #include <common.h> 11ea0364f1SPeter Tyser 124c93da7cSAneesh V void __flush_cache(unsigned long start, unsigned long size) 13ea0364f1SPeter Tyser { 147f5eef93STom Rini #if defined(CONFIG_ARM1136) 15ea0364f1SPeter Tyser 16*b4ee1491SAlbert ARIBAUD #if !defined(CONFIG_SYS_ICACHE_OFF) 17*b4ee1491SAlbert ARIBAUD asm("mcr p15, 0, r1, c7, c5, 0"); /* invalidate I cache */ 18ea0364f1SPeter Tyser #endif 19*b4ee1491SAlbert ARIBAUD 20*b4ee1491SAlbert ARIBAUD #if !defined(CONFIG_SYS_DCACHE_OFF) 21*b4ee1491SAlbert ARIBAUD asm("mcr p15, 0, r1, c7, c14, 0"); /* Clean+invalidate D cache */ 22*b4ee1491SAlbert ARIBAUD #endif 23*b4ee1491SAlbert ARIBAUD 24*b4ee1491SAlbert ARIBAUD #endif /* CONFIG_ARM1136 */ 25*b4ee1491SAlbert ARIBAUD 26c3330e9dSHeiko Schocher #ifdef CONFIG_ARM926EJS 27c3330e9dSHeiko Schocher /* test and clean, page 2-23 of arm926ejs manual */ 28c3330e9dSHeiko Schocher asm("0: mrc p15, 0, r15, c7, c10, 3\n\t" "bne 0b\n" : : : "memory"); 29c3330e9dSHeiko Schocher /* disable write buffer as well (page 2-22) */ 30c3330e9dSHeiko Schocher asm("mcr p15, 0, %0, c7, c10, 4" : : "r" (0)); 31*b4ee1491SAlbert ARIBAUD #endif /* CONFIG_ARM926EJS */ 32ea0364f1SPeter Tyser return; 33ea0364f1SPeter Tyser } 344c93da7cSAneesh V void flush_cache(unsigned long start, unsigned long size) 354c93da7cSAneesh V __attribute__((weak, alias("__flush_cache"))); 36e05f0079SAneesh V 37e05f0079SAneesh V /* 38e05f0079SAneesh V * Default implementation: 39e05f0079SAneesh V * do a range flush for the entire range 40e05f0079SAneesh V */ 41e05f0079SAneesh V void __flush_dcache_all(void) 42e05f0079SAneesh V { 43e05f0079SAneesh V flush_cache(0, ~0); 44e05f0079SAneesh V } 45e05f0079SAneesh V void flush_dcache_all(void) 46e05f0079SAneesh V __attribute__((weak, alias("__flush_dcache_all"))); 47cba4b180SAneesh V 48cba4b180SAneesh V 49cba4b180SAneesh V /* 50cba4b180SAneesh V * Default implementation of enable_caches() 51cba4b180SAneesh V * Real implementation should be in platform code 52cba4b180SAneesh V */ 53cba4b180SAneesh V void __enable_caches(void) 54cba4b180SAneesh V { 55cba4b180SAneesh V puts("WARNING: Caches not enabled\n"); 56cba4b180SAneesh V } 57cba4b180SAneesh V void enable_caches(void) 58cba4b180SAneesh V __attribute__((weak, alias("__enable_caches"))); 59