1a43febdeSKhoronzhuk, Ivan /* 2a43febdeSKhoronzhuk, Ivan * Texas Instruments Keystone SerDes driver 3a43febdeSKhoronzhuk, Ivan * 4a43febdeSKhoronzhuk, Ivan * (C) Copyright 2014 5a43febdeSKhoronzhuk, Ivan * Texas Instruments Incorporated, <www.ti.com> 6a43febdeSKhoronzhuk, Ivan * 7a43febdeSKhoronzhuk, Ivan * SPDX-License-Identifier: GPL-2.0+ 8a43febdeSKhoronzhuk, Ivan */ 9a43febdeSKhoronzhuk, Ivan 10a43febdeSKhoronzhuk, Ivan #ifndef __TI_KEYSTONE_SERDES_H__ 11a43febdeSKhoronzhuk, Ivan #define __TI_KEYSTONE_SERDES_H__ 12a43febdeSKhoronzhuk, Ivan 13*92a16c81SHao Zhang /* SERDES Reference clock */ 14*92a16c81SHao Zhang enum ks2_serdes_clock { 15*92a16c81SHao Zhang SERDES_CLOCK_100M, /* 100 MHz */ 16*92a16c81SHao Zhang SERDES_CLOCK_122P88M, /* 122.88 MHz */ 17*92a16c81SHao Zhang SERDES_CLOCK_125M, /* 125 MHz */ 18*92a16c81SHao Zhang SERDES_CLOCK_156P25M, /* 156.25 MHz */ 19*92a16c81SHao Zhang SERDES_CLOCK_312P5M, /* 312.5 MHz */ 20*92a16c81SHao Zhang }; 21*92a16c81SHao Zhang 22*92a16c81SHao Zhang /* SERDES Lane Baud Rate */ 23*92a16c81SHao Zhang enum ks2_serdes_rate { 24*92a16c81SHao Zhang SERDES_RATE_4P9152G, /* 4.9152 GBaud */ 25*92a16c81SHao Zhang SERDES_RATE_5G, /* 5 GBaud */ 26*92a16c81SHao Zhang SERDES_RATE_6P144G, /* 6.144 GBaud */ 27*92a16c81SHao Zhang SERDES_RATE_6P25G, /* 6.25 GBaud */ 28*92a16c81SHao Zhang SERDES_RATE_10p3125g, /* 10.3215 GBaud */ 29*92a16c81SHao Zhang SERDES_RATE_12p5g, /* 12.5 GBaud */ 30*92a16c81SHao Zhang }; 31*92a16c81SHao Zhang 32*92a16c81SHao Zhang /* SERDES Lane Rate Mode */ 33*92a16c81SHao Zhang enum ks2_serdes_rate_mode { 34*92a16c81SHao Zhang SERDES_FULL_RATE, 35*92a16c81SHao Zhang SERDES_HALF_RATE, 36*92a16c81SHao Zhang SERDES_QUARTER_RATE, 37*92a16c81SHao Zhang }; 38*92a16c81SHao Zhang 39*92a16c81SHao Zhang /* SERDES PHY TYPE */ 40*92a16c81SHao Zhang enum ks2_serdes_interface { 41*92a16c81SHao Zhang SERDES_PHY_SGMII, 42*92a16c81SHao Zhang SERDES_PHY_PCSR, /* XGE SERDES */ 43*92a16c81SHao Zhang }; 44*92a16c81SHao Zhang 45*92a16c81SHao Zhang struct ks2_serdes { 46*92a16c81SHao Zhang enum ks2_serdes_clock clk; 47*92a16c81SHao Zhang enum ks2_serdes_rate rate; 48*92a16c81SHao Zhang enum ks2_serdes_rate_mode rate_mode; 49*92a16c81SHao Zhang enum ks2_serdes_interface intf; 50*92a16c81SHao Zhang u32 loopback; 51*92a16c81SHao Zhang }; 52*92a16c81SHao Zhang 53*92a16c81SHao Zhang int ks2_serdes_init(u32 base, struct ks2_serdes *serdes, u32 num_lanes); 54a43febdeSKhoronzhuk, Ivan 55a43febdeSKhoronzhuk, Ivan #endif /* __TI_KEYSTONE_SERDES_H__ */ 56