xref: /rk3399_rockchip-uboot/arch/arm/include/asm/opcodes.h (revision c2da86f39ed6cbccccc2736bdc421fd606734232)
1*c2da86f3SMasahiro Yamada /*
2*c2da86f3SMasahiro Yamada  *  arch/arm/include/asm/opcodes.h
3*c2da86f3SMasahiro Yamada  *
4*c2da86f3SMasahiro Yamada  * This program is free software; you can redistribute it and/or modify
5*c2da86f3SMasahiro Yamada  * it under the terms of the GNU General Public License version 2 as
6*c2da86f3SMasahiro Yamada  * published by the Free Software Foundation.
7*c2da86f3SMasahiro Yamada  */
8*c2da86f3SMasahiro Yamada 
9*c2da86f3SMasahiro Yamada #ifndef __ASM_ARM_OPCODES_H
10*c2da86f3SMasahiro Yamada #define __ASM_ARM_OPCODES_H
11*c2da86f3SMasahiro Yamada 
12*c2da86f3SMasahiro Yamada #ifndef __ASSEMBLY__
13*c2da86f3SMasahiro Yamada #include <linux/linkage.h>
14*c2da86f3SMasahiro Yamada extern asmlinkage unsigned int arm_check_condition(u32 opcode, u32 psr);
15*c2da86f3SMasahiro Yamada #endif
16*c2da86f3SMasahiro Yamada 
17*c2da86f3SMasahiro Yamada #define ARM_OPCODE_CONDTEST_FAIL   0
18*c2da86f3SMasahiro Yamada #define ARM_OPCODE_CONDTEST_PASS   1
19*c2da86f3SMasahiro Yamada #define ARM_OPCODE_CONDTEST_UNCOND 2
20*c2da86f3SMasahiro Yamada 
21*c2da86f3SMasahiro Yamada 
22*c2da86f3SMasahiro Yamada /*
23*c2da86f3SMasahiro Yamada  * Assembler opcode byteswap helpers.
24*c2da86f3SMasahiro Yamada  * These are only intended for use by this header: don't use them directly,
25*c2da86f3SMasahiro Yamada  * because they will be suboptimal in most cases.
26*c2da86f3SMasahiro Yamada  */
27*c2da86f3SMasahiro Yamada #define ___asm_opcode_swab32(x) (	\
28*c2da86f3SMasahiro Yamada 	  (((x) << 24) & 0xFF000000)	\
29*c2da86f3SMasahiro Yamada 	| (((x) <<  8) & 0x00FF0000)	\
30*c2da86f3SMasahiro Yamada 	| (((x) >>  8) & 0x0000FF00)	\
31*c2da86f3SMasahiro Yamada 	| (((x) >> 24) & 0x000000FF)	\
32*c2da86f3SMasahiro Yamada )
33*c2da86f3SMasahiro Yamada #define ___asm_opcode_swab16(x) (	\
34*c2da86f3SMasahiro Yamada 	  (((x) << 8) & 0xFF00)		\
35*c2da86f3SMasahiro Yamada 	| (((x) >> 8) & 0x00FF)		\
36*c2da86f3SMasahiro Yamada )
37*c2da86f3SMasahiro Yamada #define ___asm_opcode_swahb32(x) (	\
38*c2da86f3SMasahiro Yamada 	  (((x) << 8) & 0xFF00FF00)	\
39*c2da86f3SMasahiro Yamada 	| (((x) >> 8) & 0x00FF00FF)	\
40*c2da86f3SMasahiro Yamada )
41*c2da86f3SMasahiro Yamada #define ___asm_opcode_swahw32(x) (	\
42*c2da86f3SMasahiro Yamada 	  (((x) << 16) & 0xFFFF0000)	\
43*c2da86f3SMasahiro Yamada 	| (((x) >> 16) & 0x0000FFFF)	\
44*c2da86f3SMasahiro Yamada )
45*c2da86f3SMasahiro Yamada #define ___asm_opcode_identity32(x) ((x) & 0xFFFFFFFF)
46*c2da86f3SMasahiro Yamada #define ___asm_opcode_identity16(x) ((x) & 0xFFFF)
47*c2da86f3SMasahiro Yamada 
48*c2da86f3SMasahiro Yamada 
49*c2da86f3SMasahiro Yamada /*
50*c2da86f3SMasahiro Yamada  * Opcode byteswap helpers
51*c2da86f3SMasahiro Yamada  *
52*c2da86f3SMasahiro Yamada  * These macros help with converting instructions between a canonical integer
53*c2da86f3SMasahiro Yamada  * format and in-memory representation, in an endianness-agnostic manner.
54*c2da86f3SMasahiro Yamada  *
55*c2da86f3SMasahiro Yamada  * __mem_to_opcode_*() convert from in-memory representation to canonical form.
56*c2da86f3SMasahiro Yamada  * __opcode_to_mem_*() convert from canonical form to in-memory representation.
57*c2da86f3SMasahiro Yamada  *
58*c2da86f3SMasahiro Yamada  *
59*c2da86f3SMasahiro Yamada  * Canonical instruction representation:
60*c2da86f3SMasahiro Yamada  *
61*c2da86f3SMasahiro Yamada  *	ARM:		0xKKLLMMNN
62*c2da86f3SMasahiro Yamada  *	Thumb 16-bit:	0x0000KKLL, where KK < 0xE8
63*c2da86f3SMasahiro Yamada  *	Thumb 32-bit:	0xKKLLMMNN, where KK >= 0xE8
64*c2da86f3SMasahiro Yamada  *
65*c2da86f3SMasahiro Yamada  * There is no way to distinguish an ARM instruction in canonical representation
66*c2da86f3SMasahiro Yamada  * from a Thumb instruction (just as these cannot be distinguished in memory).
67*c2da86f3SMasahiro Yamada  * Where this distinction is important, it needs to be tracked separately.
68*c2da86f3SMasahiro Yamada  *
69*c2da86f3SMasahiro Yamada  * Note that values in the range 0x0000E800..0xE7FFFFFF intentionally do not
70*c2da86f3SMasahiro Yamada  * represent any valid Thumb-2 instruction.  For this range,
71*c2da86f3SMasahiro Yamada  * __opcode_is_thumb32() and __opcode_is_thumb16() will both be false.
72*c2da86f3SMasahiro Yamada  *
73*c2da86f3SMasahiro Yamada  * The ___asm variants are intended only for use by this header, in situations
74*c2da86f3SMasahiro Yamada  * involving inline assembler.  For .S files, the normal __opcode_*() macros
75*c2da86f3SMasahiro Yamada  * should do the right thing.
76*c2da86f3SMasahiro Yamada  */
77*c2da86f3SMasahiro Yamada #ifdef __ASSEMBLY__
78*c2da86f3SMasahiro Yamada 
79*c2da86f3SMasahiro Yamada #define ___opcode_swab32(x) ___asm_opcode_swab32(x)
80*c2da86f3SMasahiro Yamada #define ___opcode_swab16(x) ___asm_opcode_swab16(x)
81*c2da86f3SMasahiro Yamada #define ___opcode_swahb32(x) ___asm_opcode_swahb32(x)
82*c2da86f3SMasahiro Yamada #define ___opcode_swahw32(x) ___asm_opcode_swahw32(x)
83*c2da86f3SMasahiro Yamada #define ___opcode_identity32(x) ___asm_opcode_identity32(x)
84*c2da86f3SMasahiro Yamada #define ___opcode_identity16(x) ___asm_opcode_identity16(x)
85*c2da86f3SMasahiro Yamada 
86*c2da86f3SMasahiro Yamada #else /* ! __ASSEMBLY__ */
87*c2da86f3SMasahiro Yamada 
88*c2da86f3SMasahiro Yamada #include <linux/types.h>
89*c2da86f3SMasahiro Yamada #include <linux/swab.h>
90*c2da86f3SMasahiro Yamada 
91*c2da86f3SMasahiro Yamada #define ___opcode_swab32(x) swab32(x)
92*c2da86f3SMasahiro Yamada #define ___opcode_swab16(x) swab16(x)
93*c2da86f3SMasahiro Yamada #define ___opcode_swahb32(x) swahb32(x)
94*c2da86f3SMasahiro Yamada #define ___opcode_swahw32(x) swahw32(x)
95*c2da86f3SMasahiro Yamada #define ___opcode_identity32(x) ((u32)(x))
96*c2da86f3SMasahiro Yamada #define ___opcode_identity16(x) ((u16)(x))
97*c2da86f3SMasahiro Yamada 
98*c2da86f3SMasahiro Yamada #endif /* ! __ASSEMBLY__ */
99*c2da86f3SMasahiro Yamada 
100*c2da86f3SMasahiro Yamada 
101*c2da86f3SMasahiro Yamada #ifdef CONFIG_CPU_ENDIAN_BE8
102*c2da86f3SMasahiro Yamada 
103*c2da86f3SMasahiro Yamada #define __opcode_to_mem_arm(x) ___opcode_swab32(x)
104*c2da86f3SMasahiro Yamada #define __opcode_to_mem_thumb16(x) ___opcode_swab16(x)
105*c2da86f3SMasahiro Yamada #define __opcode_to_mem_thumb32(x) ___opcode_swahb32(x)
106*c2da86f3SMasahiro Yamada #define ___asm_opcode_to_mem_arm(x) ___asm_opcode_swab32(x)
107*c2da86f3SMasahiro Yamada #define ___asm_opcode_to_mem_thumb16(x) ___asm_opcode_swab16(x)
108*c2da86f3SMasahiro Yamada #define ___asm_opcode_to_mem_thumb32(x) ___asm_opcode_swahb32(x)
109*c2da86f3SMasahiro Yamada 
110*c2da86f3SMasahiro Yamada #else /* ! CONFIG_CPU_ENDIAN_BE8 */
111*c2da86f3SMasahiro Yamada 
112*c2da86f3SMasahiro Yamada #define __opcode_to_mem_arm(x) ___opcode_identity32(x)
113*c2da86f3SMasahiro Yamada #define __opcode_to_mem_thumb16(x) ___opcode_identity16(x)
114*c2da86f3SMasahiro Yamada #define ___asm_opcode_to_mem_arm(x) ___asm_opcode_identity32(x)
115*c2da86f3SMasahiro Yamada #define ___asm_opcode_to_mem_thumb16(x) ___asm_opcode_identity16(x)
116*c2da86f3SMasahiro Yamada #ifndef CONFIG_CPU_ENDIAN_BE32
117*c2da86f3SMasahiro Yamada /*
118*c2da86f3SMasahiro Yamada  * On BE32 systems, using 32-bit accesses to store Thumb instructions will not
119*c2da86f3SMasahiro Yamada  * work in all cases, due to alignment constraints.  For now, a correct
120*c2da86f3SMasahiro Yamada  * version is not provided for BE32.
121*c2da86f3SMasahiro Yamada  */
122*c2da86f3SMasahiro Yamada #define __opcode_to_mem_thumb32(x) ___opcode_swahw32(x)
123*c2da86f3SMasahiro Yamada #define ___asm_opcode_to_mem_thumb32(x) ___asm_opcode_swahw32(x)
124*c2da86f3SMasahiro Yamada #endif
125*c2da86f3SMasahiro Yamada 
126*c2da86f3SMasahiro Yamada #endif /* ! CONFIG_CPU_ENDIAN_BE8 */
127*c2da86f3SMasahiro Yamada 
128*c2da86f3SMasahiro Yamada #define __mem_to_opcode_arm(x) __opcode_to_mem_arm(x)
129*c2da86f3SMasahiro Yamada #define __mem_to_opcode_thumb16(x) __opcode_to_mem_thumb16(x)
130*c2da86f3SMasahiro Yamada #ifndef CONFIG_CPU_ENDIAN_BE32
131*c2da86f3SMasahiro Yamada #define __mem_to_opcode_thumb32(x) __opcode_to_mem_thumb32(x)
132*c2da86f3SMasahiro Yamada #endif
133*c2da86f3SMasahiro Yamada 
134*c2da86f3SMasahiro Yamada /* Operations specific to Thumb opcodes */
135*c2da86f3SMasahiro Yamada 
136*c2da86f3SMasahiro Yamada /* Instruction size checks: */
137*c2da86f3SMasahiro Yamada #define __opcode_is_thumb32(x) (		\
138*c2da86f3SMasahiro Yamada 	   ((x) & 0xF8000000) == 0xE8000000	\
139*c2da86f3SMasahiro Yamada 	|| ((x) & 0xF0000000) == 0xF0000000	\
140*c2da86f3SMasahiro Yamada )
141*c2da86f3SMasahiro Yamada #define __opcode_is_thumb16(x) (					\
142*c2da86f3SMasahiro Yamada 	   ((x) & 0xFFFF0000) == 0					\
143*c2da86f3SMasahiro Yamada 	&& !(((x) & 0xF800) == 0xE800 || ((x) & 0xF000) == 0xF000)	\
144*c2da86f3SMasahiro Yamada )
145*c2da86f3SMasahiro Yamada 
146*c2da86f3SMasahiro Yamada /* Operations to construct or split 32-bit Thumb instructions: */
147*c2da86f3SMasahiro Yamada #define __opcode_thumb32_first(x) (___opcode_identity16((x) >> 16))
148*c2da86f3SMasahiro Yamada #define __opcode_thumb32_second(x) (___opcode_identity16(x))
149*c2da86f3SMasahiro Yamada #define __opcode_thumb32_compose(first, second) (			\
150*c2da86f3SMasahiro Yamada 	  (___opcode_identity32(___opcode_identity16(first)) << 16)	\
151*c2da86f3SMasahiro Yamada 	| ___opcode_identity32(___opcode_identity16(second))		\
152*c2da86f3SMasahiro Yamada )
153*c2da86f3SMasahiro Yamada #define ___asm_opcode_thumb32_first(x) (___asm_opcode_identity16((x) >> 16))
154*c2da86f3SMasahiro Yamada #define ___asm_opcode_thumb32_second(x) (___asm_opcode_identity16(x))
155*c2da86f3SMasahiro Yamada #define ___asm_opcode_thumb32_compose(first, second) (			    \
156*c2da86f3SMasahiro Yamada 	  (___asm_opcode_identity32(___asm_opcode_identity16(first)) << 16) \
157*c2da86f3SMasahiro Yamada 	| ___asm_opcode_identity32(___asm_opcode_identity16(second))	    \
158*c2da86f3SMasahiro Yamada )
159*c2da86f3SMasahiro Yamada 
160*c2da86f3SMasahiro Yamada /*
161*c2da86f3SMasahiro Yamada  * Opcode injection helpers
162*c2da86f3SMasahiro Yamada  *
163*c2da86f3SMasahiro Yamada  * In rare cases it is necessary to assemble an opcode which the
164*c2da86f3SMasahiro Yamada  * assembler does not support directly, or which would normally be
165*c2da86f3SMasahiro Yamada  * rejected because of the CFLAGS or AFLAGS used to build the affected
166*c2da86f3SMasahiro Yamada  * file.
167*c2da86f3SMasahiro Yamada  *
168*c2da86f3SMasahiro Yamada  * Before using these macros, consider carefully whether it is feasible
169*c2da86f3SMasahiro Yamada  * instead to change the build flags for your file, or whether it really
170*c2da86f3SMasahiro Yamada  * makes sense to support old assembler versions when building that
171*c2da86f3SMasahiro Yamada  * particular kernel feature.
172*c2da86f3SMasahiro Yamada  *
173*c2da86f3SMasahiro Yamada  * The macros defined here should only be used where there is no viable
174*c2da86f3SMasahiro Yamada  * alternative.
175*c2da86f3SMasahiro Yamada  *
176*c2da86f3SMasahiro Yamada  *
177*c2da86f3SMasahiro Yamada  * __inst_arm(x): emit the specified ARM opcode
178*c2da86f3SMasahiro Yamada  * __inst_thumb16(x): emit the specified 16-bit Thumb opcode
179*c2da86f3SMasahiro Yamada  * __inst_thumb32(x): emit the specified 32-bit Thumb opcode
180*c2da86f3SMasahiro Yamada  *
181*c2da86f3SMasahiro Yamada  * __inst_arm_thumb16(arm, thumb): emit either the specified arm or
182*c2da86f3SMasahiro Yamada  *	16-bit Thumb opcode, depending on whether an ARM or Thumb-2
183*c2da86f3SMasahiro Yamada  *	kernel is being built
184*c2da86f3SMasahiro Yamada  *
185*c2da86f3SMasahiro Yamada  * __inst_arm_thumb32(arm, thumb): emit either the specified arm or
186*c2da86f3SMasahiro Yamada  *	32-bit Thumb opcode, depending on whether an ARM or Thumb-2
187*c2da86f3SMasahiro Yamada  *	kernel is being built
188*c2da86f3SMasahiro Yamada  *
189*c2da86f3SMasahiro Yamada  *
190*c2da86f3SMasahiro Yamada  * Note that using these macros directly is poor practice.  Instead, you
191*c2da86f3SMasahiro Yamada  * should use them to define human-readable wrapper macros to encode the
192*c2da86f3SMasahiro Yamada  * instructions that you care about.  In code which might run on ARMv7 or
193*c2da86f3SMasahiro Yamada  * above, you can usually use the __inst_arm_thumb{16,32} macros to
194*c2da86f3SMasahiro Yamada  * specify the ARM and Thumb alternatives at the same time.  This ensures
195*c2da86f3SMasahiro Yamada  * that the correct opcode gets emitted depending on the instruction set
196*c2da86f3SMasahiro Yamada  * used for the kernel build.
197*c2da86f3SMasahiro Yamada  *
198*c2da86f3SMasahiro Yamada  * Look at opcodes-virt.h for an example of how to use these macros.
199*c2da86f3SMasahiro Yamada  */
200*c2da86f3SMasahiro Yamada #include <linux/stringify.h>
201*c2da86f3SMasahiro Yamada 
202*c2da86f3SMasahiro Yamada #define __inst_arm(x) ___inst_arm(___asm_opcode_to_mem_arm(x))
203*c2da86f3SMasahiro Yamada #define __inst_thumb32(x) ___inst_thumb32(				\
204*c2da86f3SMasahiro Yamada 	___asm_opcode_to_mem_thumb16(___asm_opcode_thumb32_first(x)),	\
205*c2da86f3SMasahiro Yamada 	___asm_opcode_to_mem_thumb16(___asm_opcode_thumb32_second(x))	\
206*c2da86f3SMasahiro Yamada )
207*c2da86f3SMasahiro Yamada #define __inst_thumb16(x) ___inst_thumb16(___asm_opcode_to_mem_thumb16(x))
208*c2da86f3SMasahiro Yamada 
209*c2da86f3SMasahiro Yamada #ifdef CONFIG_THUMB2_KERNEL
210*c2da86f3SMasahiro Yamada #define __inst_arm_thumb16(arm_opcode, thumb_opcode) \
211*c2da86f3SMasahiro Yamada 	__inst_thumb16(thumb_opcode)
212*c2da86f3SMasahiro Yamada #define __inst_arm_thumb32(arm_opcode, thumb_opcode) \
213*c2da86f3SMasahiro Yamada 	__inst_thumb32(thumb_opcode)
214*c2da86f3SMasahiro Yamada #else
215*c2da86f3SMasahiro Yamada #define __inst_arm_thumb16(arm_opcode, thumb_opcode) __inst_arm(arm_opcode)
216*c2da86f3SMasahiro Yamada #define __inst_arm_thumb32(arm_opcode, thumb_opcode) __inst_arm(arm_opcode)
217*c2da86f3SMasahiro Yamada #endif
218*c2da86f3SMasahiro Yamada 
219*c2da86f3SMasahiro Yamada /* Helpers for the helpers.  Don't use these directly. */
220*c2da86f3SMasahiro Yamada #ifdef __ASSEMBLY__
221*c2da86f3SMasahiro Yamada #define ___inst_arm(x) .long x
222*c2da86f3SMasahiro Yamada #define ___inst_thumb16(x) .short x
223*c2da86f3SMasahiro Yamada #define ___inst_thumb32(first, second) .short first, second
224*c2da86f3SMasahiro Yamada #else
225*c2da86f3SMasahiro Yamada #define ___inst_arm(x) ".long " __stringify(x) "\n\t"
226*c2da86f3SMasahiro Yamada #define ___inst_thumb16(x) ".short " __stringify(x) "\n\t"
227*c2da86f3SMasahiro Yamada #define ___inst_thumb32(first, second) \
228*c2da86f3SMasahiro Yamada 	".short " __stringify(first) ", " __stringify(second) "\n\t"
229*c2da86f3SMasahiro Yamada #endif
230*c2da86f3SMasahiro Yamada 
231*c2da86f3SMasahiro Yamada #endif /* __ASM_ARM_OPCODES_H */
232