xref: /rk3399_rockchip-uboot/arch/arm/include/asm/mach-imx/mxc_i2c.h (revision 39632b4a01210e329333d787d828157dcd2c7328)
1*552a848eSStefano Babic /*
2*552a848eSStefano Babic  * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
3*552a848eSStefano Babic  *
4*552a848eSStefano Babic  * SPDX-License-Identifier:	GPL-2.0+
5*552a848eSStefano Babic  */
6*552a848eSStefano Babic #ifndef __ASM_ARCH_MXC_MXC_I2C_H__
7*552a848eSStefano Babic #define __ASM_ARCH_MXC_MXC_I2C_H__
8*552a848eSStefano Babic #include <asm-generic/gpio.h>
9*552a848eSStefano Babic #include <asm/mach-imx/iomux-v3.h>
10*552a848eSStefano Babic 
11*552a848eSStefano Babic struct i2c_pin_ctrl {
12*552a848eSStefano Babic 	iomux_v3_cfg_t i2c_mode;
13*552a848eSStefano Babic 	iomux_v3_cfg_t gpio_mode;
14*552a848eSStefano Babic 	unsigned char gp;
15*552a848eSStefano Babic 	unsigned char spare;
16*552a848eSStefano Babic };
17*552a848eSStefano Babic 
18*552a848eSStefano Babic struct i2c_pads_info {
19*552a848eSStefano Babic 	struct i2c_pin_ctrl scl;
20*552a848eSStefano Babic 	struct i2c_pin_ctrl sda;
21*552a848eSStefano Babic };
22*552a848eSStefano Babic 
23*552a848eSStefano Babic /*
24*552a848eSStefano Babic  * Information about i2c controller
25*552a848eSStefano Babic  * struct mxc_i2c_bus - information about the i2c[x] bus
26*552a848eSStefano Babic  * @index: i2c bus index
27*552a848eSStefano Babic  * @base: Address of I2C bus controller
28*552a848eSStefano Babic  * @driver_data: Flags for different platforms, such as I2C_QUIRK_FLAG.
29*552a848eSStefano Babic  * @speed: Speed of I2C bus
30*552a848eSStefano Babic  * @pads_info: pinctrl info for this i2c bus, will be used when pinctrl is ok.
31*552a848eSStefano Babic  * The following two is only to be compatible with non-DM part.
32*552a848eSStefano Babic  * @idle_bus_fn: function to force bus idle
33*552a848eSStefano Babic  * @idle_bus_data: parameter for idle_bus_fun
34*552a848eSStefano Babic  * For DM:
35*552a848eSStefano Babic  * bus: The device structure for i2c bus controller
36*552a848eSStefano Babic  * scl-gpio: specify the gpio related to SCL pin
37*552a848eSStefano Babic  * sda-gpio: specify the gpio related to SDA pin
38*552a848eSStefano Babic  */
39*552a848eSStefano Babic struct mxc_i2c_bus {
40*552a848eSStefano Babic 	/*
41*552a848eSStefano Babic 	 * board file can use this index to locate which i2c_pads_info is for
42*552a848eSStefano Babic 	 * i2c_idle_bus. When pinmux is implement, this entry can be
43*552a848eSStefano Babic 	 * discarded. Here we do not use dev->seq, because we do not want to
44*552a848eSStefano Babic 	 * export device to board file.
45*552a848eSStefano Babic 	 */
46*552a848eSStefano Babic 	int index;
47*552a848eSStefano Babic 	ulong base;
48*552a848eSStefano Babic 	ulong driver_data;
49*552a848eSStefano Babic 	int speed;
50*552a848eSStefano Babic 	struct i2c_pads_info *pads_info;
51*552a848eSStefano Babic #ifndef CONFIG_DM_I2C
52*552a848eSStefano Babic 	int (*idle_bus_fn)(void *p);
53*552a848eSStefano Babic 	void *idle_bus_data;
54*552a848eSStefano Babic #else
55*552a848eSStefano Babic 	struct udevice *bus;
56*552a848eSStefano Babic 	/* Use gpio to force bus idle when bus state is abnormal */
57*552a848eSStefano Babic 	struct gpio_desc scl_gpio;
58*552a848eSStefano Babic 	struct gpio_desc sda_gpio;
59*552a848eSStefano Babic #endif
60*552a848eSStefano Babic };
61*552a848eSStefano Babic 
62*552a848eSStefano Babic #if defined(CONFIG_MX6QDL)
63*552a848eSStefano Babic #define I2C_PADS(name, scl_i2c, scl_gpio, scl_gp, sda_i2c, sda_gpio, sda_gp) \
64*552a848eSStefano Babic 	struct i2c_pads_info mx6q_##name = {		\
65*552a848eSStefano Babic 		.scl = {				\
66*552a848eSStefano Babic 			.i2c_mode = MX6Q_##scl_i2c,	\
67*552a848eSStefano Babic 			.gpio_mode = MX6Q_##scl_gpio,	\
68*552a848eSStefano Babic 			.gp = scl_gp,			\
69*552a848eSStefano Babic 		},					\
70*552a848eSStefano Babic 		.sda = {				\
71*552a848eSStefano Babic 			.i2c_mode = MX6Q_##sda_i2c,	\
72*552a848eSStefano Babic 			.gpio_mode = MX6Q_##sda_gpio,	\
73*552a848eSStefano Babic 			.gp = sda_gp,			\
74*552a848eSStefano Babic 		}					\
75*552a848eSStefano Babic 	};						\
76*552a848eSStefano Babic 	struct i2c_pads_info mx6s_##name = {		\
77*552a848eSStefano Babic 		.scl = {				\
78*552a848eSStefano Babic 			.i2c_mode = MX6DL_##scl_i2c,	\
79*552a848eSStefano Babic 			.gpio_mode = MX6DL_##scl_gpio,	\
80*552a848eSStefano Babic 			.gp = scl_gp,			\
81*552a848eSStefano Babic 		},					\
82*552a848eSStefano Babic 		.sda = {				\
83*552a848eSStefano Babic 			.i2c_mode = MX6DL_##sda_i2c,	\
84*552a848eSStefano Babic 			.gpio_mode = MX6DL_##sda_gpio,	\
85*552a848eSStefano Babic 			.gp = sda_gp,			\
86*552a848eSStefano Babic 		}					\
87*552a848eSStefano Babic 	};
88*552a848eSStefano Babic 
89*552a848eSStefano Babic 
90*552a848eSStefano Babic #define I2C_PADS_INFO(name)	\
91*552a848eSStefano Babic 	(is_cpu_type(MXC_CPU_MX6Q) || is_cpu_type(MXC_CPU_MX6D)) ? \
92*552a848eSStefano Babic 					&mx6q_##name : &mx6s_##name
93*552a848eSStefano Babic #endif
94*552a848eSStefano Babic 
95*552a848eSStefano Babic int setup_i2c(unsigned i2c_index, int speed, int slave_addr,
96*552a848eSStefano Babic 	      struct i2c_pads_info *p);
97*552a848eSStefano Babic void bus_i2c_init(int index, int speed, int slave_addr,
98*552a848eSStefano Babic 		int (*idle_bus_fn)(void *p), void *p);
99*552a848eSStefano Babic int force_idle_bus(void *priv);
100*552a848eSStefano Babic int i2c_idle_bus(struct mxc_i2c_bus *i2c_bus);
101*552a848eSStefano Babic #endif
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