1 /* 2 * Copyright 2015 Freescale Semiconductor, Inc. 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef __FSL_SECURE_BOOT_H 8 #define __FSL_SECURE_BOOT_H 9 10 #ifdef CONFIG_CHAIN_OF_TRUST 11 #define CONFIG_FSL_SEC_MON 12 13 #ifdef CONFIG_SPL_BUILD 14 /* 15 * Define the key hash for U-Boot here if public/private key pair used to 16 * sign U-boot are different from the SRK hash put in the fuse 17 * Example of defining KEY_HASH is 18 * #define CONFIG_SPL_UBOOT_KEY_HASH \ 19 * "41066b564c6ffcef40ccbc1e0a5d0d519604000c785d97bbefd25e4d288d1c8b" 20 * else leave it defined as NULL 21 */ 22 23 #define CONFIG_SPL_UBOOT_KEY_HASH NULL 24 #endif /* ifdef CONFIG_SPL_BUILD */ 25 26 #define CONFIG_KEY_REVOCATION 27 28 #ifndef CONFIG_SPL_BUILD 29 #define CONFIG_CMD_HASH 30 #ifndef CONFIG_SYS_RAMBOOT 31 /* The key used for verification of next level images 32 * is picked up from an Extension Table which has 33 * been verified by the ISBC (Internal Secure boot Code) 34 * in boot ROM of the SoC. 35 * The feature is only applicable in case of NOR boot and is 36 * not applicable in case of RAMBOOT (NAND, SD, SPI). 37 * For LS, this feature is available for all device if IE Table 38 * is copied to XIP memory 39 * Also, for LS, ISBC doesn't verify this table. 40 */ 41 #define CONFIG_FSL_ISBC_KEY_EXT 42 43 #endif 44 45 #if defined(CONFIG_FSL_LAYERSCAPE) 46 /* 47 * For fsl layerscape based platforms, ESBC image Address in Header 48 * is 64 bit. 49 */ 50 #define CONFIG_ESBC_ADDR_64BIT 51 #endif 52 53 #ifdef CONFIG_ARCH_LS2080A 54 #define CONFIG_EXTRA_ENV \ 55 "setenv fdt_high 0xa0000000;" \ 56 "setenv initrd_high 0xcfffffff;" \ 57 "setenv hwconfig \'fsl_ddr:ctlr_intlv=null,bank_intlv=null\';" 58 #else 59 #define CONFIG_EXTRA_ENV \ 60 "setenv fdt_high 0xffffffff;" \ 61 "setenv initrd_high 0xffffffff;" \ 62 "setenv hwconfig \'fsl_ddr:ctlr_intlv=null,bank_intlv=null\';" 63 #endif 64 65 /* Copying Bootscript and Header to DDR from NOR for LS2 and for rest, from 66 * Non-XIP Memory (Nand/SD)*/ 67 #if defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_FSL_LSCH3) || \ 68 defined(CONFIG_SD_BOOT) || defined(CONFIG_NAND_BOOT) 69 #define CONFIG_BOOTSCRIPT_COPY_RAM 70 #endif 71 /* The address needs to be modified according to NOR, NAND, SD and 72 * DDR memory map 73 */ 74 #ifdef CONFIG_FSL_LSCH3 75 #define CONFIG_BS_HDR_ADDR_DEVICE 0x580d00000 76 #define CONFIG_BS_ADDR_DEVICE 0x580e00000 77 #define CONFIG_BS_HDR_ADDR_RAM 0xa0d00000 78 #define CONFIG_BS_ADDR_RAM 0xa0e00000 79 #define CONFIG_BS_HDR_SIZE 0x00002000 80 #define CONFIG_BS_SIZE 0x00001000 81 #else 82 #ifdef CONFIG_SD_BOOT 83 /* For SD boot address and size are assigned in terms of sector 84 * offset and no. of sectors respectively. 85 */ 86 #if defined(CONFIG_ARCH_LS1043A) || defined(CONFIG_ARCH_LS1046A) 87 #define CONFIG_BS_HDR_ADDR_DEVICE 0x00000920 88 #else 89 #define CONFIG_BS_HDR_ADDR_DEVICE 0x00000900 90 #endif 91 #define CONFIG_BS_ADDR_DEVICE 0x00000940 92 #define CONFIG_BS_HDR_SIZE 0x00000010 93 #define CONFIG_BS_SIZE 0x00000008 94 #elif defined(CONFIG_NAND_BOOT) 95 #define CONFIG_BS_HDR_ADDR_DEVICE 0x00800000 96 #define CONFIG_BS_ADDR_DEVICE 0x00802000 97 #define CONFIG_BS_HDR_SIZE 0x00002000 98 #define CONFIG_BS_SIZE 0x00001000 99 #elif defined(CONFIG_QSPI_BOOT) 100 #ifdef CONFIG_ARCH_LS1046A 101 #define CONFIG_BS_HDR_ADDR_DEVICE 0x40780000 102 #define CONFIG_BS_ADDR_DEVICE 0x40800000 103 #elif defined(CONFIG_ARCH_LS1012A) 104 #define CONFIG_BS_HDR_ADDR_DEVICE 0x400c0000 105 #define CONFIG_BS_ADDR_DEVICE 0x40060000 106 #else 107 #error "Platform not supported" 108 #endif 109 #define CONFIG_BS_HDR_SIZE 0x00002000 110 #define CONFIG_BS_SIZE 0x00001000 111 #else /* Default NOR Boot */ 112 #define CONFIG_BS_HDR_ADDR_DEVICE 0x600a0000 113 #define CONFIG_BS_ADDR_DEVICE 0x60060000 114 #define CONFIG_BS_HDR_SIZE 0x00002000 115 #define CONFIG_BS_SIZE 0x00001000 116 #endif 117 #define CONFIG_BS_HDR_ADDR_RAM 0x81000000 118 #define CONFIG_BS_ADDR_RAM 0x81020000 119 #endif 120 121 #ifdef CONFIG_BOOTSCRIPT_COPY_RAM 122 #define CONFIG_BOOTSCRIPT_HDR_ADDR CONFIG_BS_HDR_ADDR_RAM 123 #define CONFIG_BOOTSCRIPT_ADDR CONFIG_BS_ADDR_RAM 124 #else 125 #define CONFIG_BOOTSCRIPT_HDR_ADDR CONFIG_BS_HDR_ADDR_DEVICE 126 /* BOOTSCRIPT_ADDR is not required */ 127 #endif 128 129 #ifdef CONFIG_FSL_LS_PPA 130 /* Define the key hash here if SRK used for signing PPA image is 131 * different from SRK hash put in SFP used for U-Boot. 132 * Example 133 * #define PPA_KEY_HASH \ 134 * "41066b564c6ffcef40ccbc1e0a5d0d519604000c785d97bbefd25e4d288d1c8b" 135 */ 136 #define PPA_KEY_HASH NULL 137 #endif /* ifdef CONFIG_FSL_LS_PPA */ 138 139 #include <config_fsl_chain_trust.h> 140 #endif /* #ifndef CONFIG_SPL_BUILD */ 141 #endif /* #ifdef CONFIG_CHAIN_OF_TRUST */ 142 #endif 143