xref: /rk3399_rockchip-uboot/arch/arm/include/asm/fsl_secure_boot.h (revision 9e971632cd6dae4fc2b30c600ff5650ecf8944f1)
1 /*
2  * Copyright 2015 Freescale Semiconductor, Inc.
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #ifndef __FSL_SECURE_BOOT_H
8 #define __FSL_SECURE_BOOT_H
9 
10 #ifdef CONFIG_SECURE_BOOT
11 
12 #ifndef CONFIG_FIT_SIGNATURE
13 #define CONFIG_CHAIN_OF_TRUST
14 #endif
15 
16 #endif
17 
18 #ifdef CONFIG_CHAIN_OF_TRUST
19 #define CONFIG_CMD_ESBC_VALIDATE
20 #define CONFIG_CMD_BLOB
21 #define CONFIG_FSL_SEC_MON
22 #define CONFIG_SHA_PROG_HW_ACCEL
23 #define CONFIG_RSA
24 #define CONFIG_RSA_FREESCALE_EXP
25 
26 #ifndef CONFIG_FSL_CAAM
27 #define CONFIG_FSL_CAAM
28 #endif
29 
30 #define CONFIG_KEY_REVOCATION
31 #ifndef CONFIG_SYS_RAMBOOT
32 /* The key used for verification of next level images
33  * is picked up from an Extension Table which has
34  * been verified by the ISBC (Internal Secure boot Code)
35  * in boot ROM of the SoC.
36  * The feature is only applicable in case of NOR boot and is
37  * not applicable in case of RAMBOOT (NAND, SD, SPI).
38  */
39 #define CONFIG_FSL_ISBC_KEY_EXT
40 #endif
41 
42 #ifdef CONFIG_LS1043A
43 /* For LS1043 (ARMv8), ESBC image Address in Header is 64 bit */
44 #define CONFIG_ESBC_ADDR_64BIT
45 #endif
46 
47 #define CONFIG_EXTRA_ENV \
48 	"setenv fdt_high 0xcfffffff;"	\
49 	"setenv initrd_high 0xcfffffff;"	\
50 	"setenv hwconfig \'fsl_ddr:ctlr_intlv=null,bank_intlv=null\';"
51 
52 /* The address needs to be modified according to NOR memory map */
53 #define CONFIG_BOOTSCRIPT_HDR_ADDR	0x600a0000
54 
55 #include <config_fsl_chain_trust.h>
56 #endif /* #ifdef CONFIG_CHAIN_OF_TRUST */
57 #endif
58