1 /* 2 * Copyright 2015 Freescale Semiconductor, Inc. 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef __FSL_SECURE_BOOT_H 8 #define __FSL_SECURE_BOOT_H 9 10 #ifdef CONFIG_SECURE_BOOT 11 12 #ifndef CONFIG_FIT_SIGNATURE 13 #define CONFIG_CHAIN_OF_TRUST 14 #endif 15 16 #endif 17 18 #ifdef CONFIG_CHAIN_OF_TRUST 19 #define CONFIG_CMD_ESBC_VALIDATE 20 #define CONFIG_CMD_BLOB 21 #define CONFIG_CMD_HASH 22 #define CONFIG_FSL_SEC_MON 23 #define CONFIG_SHA_HW_ACCEL 24 #define CONFIG_SHA_PROG_HW_ACCEL 25 #define CONFIG_RSA_FREESCALE_EXP 26 27 #ifndef CONFIG_FSL_CAAM 28 #define CONFIG_FSL_CAAM 29 #endif 30 31 #define CONFIG_KEY_REVOCATION 32 #ifndef CONFIG_SYS_RAMBOOT 33 /* The key used for verification of next level images 34 * is picked up from an Extension Table which has 35 * been verified by the ISBC (Internal Secure boot Code) 36 * in boot ROM of the SoC. 37 * The feature is only applicable in case of NOR boot and is 38 * not applicable in case of RAMBOOT (NAND, SD, SPI). 39 */ 40 #ifndef CONFIG_ESBC_HDR_LS 41 /* Current Key EXT feature not available in LS ESBC Header */ 42 #define CONFIG_FSL_ISBC_KEY_EXT 43 #endif 44 45 #endif 46 47 #if defined(CONFIG_LS1043A) || defined(CONFIG_LS2080A) ||\ 48 defined(CONFIG_LS2085A) 49 /* For LS1043 (ARMv8), ESBC image Address in Header is 64 bit 50 * Similiarly for LS2080 and LS2085 51 */ 52 #define CONFIG_ESBC_ADDR_64BIT 53 #endif 54 55 #define CONFIG_EXTRA_ENV \ 56 "setenv fdt_high 0xcfffffff;" \ 57 "setenv initrd_high 0xcfffffff;" \ 58 "setenv hwconfig \'fsl_ddr:ctlr_intlv=null,bank_intlv=null\';" 59 60 /* Copying Bootscript and Header to DDR from NOR for LS2 and for rest, from 61 * Non-XIP Memory (Nand/SD)*/ 62 #if defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_LS2080A) ||\ 63 defined(CONFIG_LS2085A) 64 #define CONFIG_BOOTSCRIPT_COPY_RAM 65 #endif 66 /* The address needs to be modified according to NOR and DDR memory map */ 67 #if defined(CONFIG_LS2080A) || defined(CONFIG_LS2085A) 68 #define CONFIG_BS_HDR_ADDR_FLASH 0x583920000 69 #define CONFIG_BS_ADDR_FLASH 0x583900000 70 #define CONFIG_BS_HDR_ADDR_RAM 0xa3920000 71 #define CONFIG_BS_ADDR_RAM 0xa3900000 72 #else 73 #define CONFIG_BS_HDR_ADDR_FLASH 0x600a0000 74 #define CONFIG_BS_ADDR_FLASH 0x60060000 75 #define CONFIG_BS_HDR_ADDR_RAM 0xa0060000 76 #define CONFIG_BS_ADDR_RAM 0xa0060000 77 #endif 78 79 #ifdef CONFIG_BOOTSCRIPT_COPY_RAM 80 #define CONFIG_BOOTSCRIPT_HDR_ADDR CONFIG_BS_HDR_ADDR_RAM 81 #define CONFIG_BS_HDR_SIZE 0x00002000 82 #define CONFIG_BOOTSCRIPT_ADDR CONFIG_BS_ADDR_RAM 83 #define CONFIG_BS_SIZE 0x00001000 84 #else 85 #define CONFIG_BOOTSCRIPT_HDR_ADDR CONFIG_BS_HDR_ADDR_FLASH 86 /* BS_HDR_SIZE, BOOTSCRIPT_ADDR and BS_SIZE are not required */ 87 #endif 88 89 #include <config_fsl_chain_trust.h> 90 #endif /* #ifdef CONFIG_CHAIN_OF_TRUST */ 91 #endif 92