xref: /rk3399_rockchip-uboot/arch/arm/include/asm/fsl_secure_boot.h (revision fcfdb6d580ab108f4496f1ef7bd7ed260488ffde)
198cb0efdSgaurav rana /*
298cb0efdSgaurav rana  * Copyright 2015 Freescale Semiconductor, Inc.
398cb0efdSgaurav rana  *
498cb0efdSgaurav rana  * SPDX-License-Identifier:	GPL-2.0+
598cb0efdSgaurav rana  */
698cb0efdSgaurav rana 
798cb0efdSgaurav rana #ifndef __FSL_SECURE_BOOT_H
898cb0efdSgaurav rana #define __FSL_SECURE_BOOT_H
998cb0efdSgaurav rana 
1098cb0efdSgaurav rana #ifdef CONFIG_SECURE_BOOT
11bdc22074SAneesh Bansal 
12bdc22074SAneesh Bansal #ifndef CONFIG_FIT_SIGNATURE
13bdc22074SAneesh Bansal #define CONFIG_CHAIN_OF_TRUST
14bdc22074SAneesh Bansal #endif
15bdc22074SAneesh Bansal 
16bdc22074SAneesh Bansal #endif
17bdc22074SAneesh Bansal 
18bdc22074SAneesh Bansal #ifdef CONFIG_CHAIN_OF_TRUST
192ed948f4SAneesh Bansal #define CONFIG_CMD_ESBC_VALIDATE
2074eecd82SAneesh Bansal #define CONFIG_CMD_BLOB
21*fcfdb6d5SSaksham Jain #define CONFIG_CMD_HASH
222ed948f4SAneesh Bansal #define CONFIG_FSL_SEC_MON
23*fcfdb6d5SSaksham Jain #define CONFIG_SHA_HW_ACCEL
242ed948f4SAneesh Bansal #define CONFIG_SHA_PROG_HW_ACCEL
252ed948f4SAneesh Bansal #define CONFIG_RSA_FREESCALE_EXP
269711f528SAneesh Bansal 
272ed948f4SAneesh Bansal #ifndef CONFIG_FSL_CAAM
282ed948f4SAneesh Bansal #define CONFIG_FSL_CAAM
292ed948f4SAneesh Bansal #endif
302ed948f4SAneesh Bansal 
312ed948f4SAneesh Bansal #define CONFIG_KEY_REVOCATION
322ed948f4SAneesh Bansal #ifndef CONFIG_SYS_RAMBOOT
332ed948f4SAneesh Bansal /* The key used for verification of next level images
342ed948f4SAneesh Bansal  * is picked up from an Extension Table which has
352ed948f4SAneesh Bansal  * been verified by the ISBC (Internal Secure boot Code)
362ed948f4SAneesh Bansal  * in boot ROM of the SoC.
372ed948f4SAneesh Bansal  * The feature is only applicable in case of NOR boot and is
382ed948f4SAneesh Bansal  * not applicable in case of RAMBOOT (NAND, SD, SPI).
392ed948f4SAneesh Bansal  */
40fd6dbc98SSaksham Jain #ifndef CONFIG_ESBC_HDR_LS
41fd6dbc98SSaksham Jain /* Current Key EXT feature not available in LS ESBC Header */
422ed948f4SAneesh Bansal #define CONFIG_FSL_ISBC_KEY_EXT
432ed948f4SAneesh Bansal #endif
442ed948f4SAneesh Bansal 
45fd6dbc98SSaksham Jain #endif
46fd6dbc98SSaksham Jain 
47*fcfdb6d5SSaksham Jain #if defined(CONFIG_LS1043A) || defined(CONFIG_LS2080A) ||\
48*fcfdb6d5SSaksham Jain 	defined(CONFIG_LS2085A)
49*fcfdb6d5SSaksham Jain /* For LS1043 (ARMv8), ESBC image Address in Header is 64 bit
50*fcfdb6d5SSaksham Jain  * Similiarly for LS2080 and LS2085
51*fcfdb6d5SSaksham Jain  */
52ef6c55a2SAneesh Bansal #define CONFIG_ESBC_ADDR_64BIT
53ef6c55a2SAneesh Bansal #endif
54ef6c55a2SAneesh Bansal 
5598cb0efdSgaurav rana #define CONFIG_EXTRA_ENV \
5698cb0efdSgaurav rana 	"setenv fdt_high 0xcfffffff;"	\
5798cb0efdSgaurav rana 	"setenv initrd_high 0xcfffffff;"	\
5898cb0efdSgaurav rana 	"setenv hwconfig \'fsl_ddr:ctlr_intlv=null,bank_intlv=null\';"
5998cb0efdSgaurav rana 
6098cb0efdSgaurav rana /* The address needs to be modified according to NOR memory map */
6198cb0efdSgaurav rana #define CONFIG_BOOTSCRIPT_HDR_ADDR	0x600a0000
6298cb0efdSgaurav rana 
63bdc22074SAneesh Bansal #include <config_fsl_chain_trust.h>
64bdc22074SAneesh Bansal #endif /* #ifdef CONFIG_CHAIN_OF_TRUST */
6598cb0efdSgaurav rana #endif
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