xref: /rk3399_rockchip-uboot/arch/arm/include/asm/fsl_secure_boot.h (revision bdc22074c511def222f93d1a9d94ec95c462c062)
198cb0efdSgaurav rana /*
298cb0efdSgaurav rana  * Copyright 2015 Freescale Semiconductor, Inc.
398cb0efdSgaurav rana  *
498cb0efdSgaurav rana  * SPDX-License-Identifier:	GPL-2.0+
598cb0efdSgaurav rana  */
698cb0efdSgaurav rana 
798cb0efdSgaurav rana #ifndef __FSL_SECURE_BOOT_H
898cb0efdSgaurav rana #define __FSL_SECURE_BOOT_H
998cb0efdSgaurav rana 
1098cb0efdSgaurav rana #ifdef CONFIG_SECURE_BOOT
11*bdc22074SAneesh Bansal 
12*bdc22074SAneesh Bansal #ifndef CONFIG_FIT_SIGNATURE
13*bdc22074SAneesh Bansal #define CONFIG_CHAIN_OF_TRUST
14*bdc22074SAneesh Bansal #endif
15*bdc22074SAneesh Bansal 
16*bdc22074SAneesh Bansal #endif
17*bdc22074SAneesh Bansal 
18*bdc22074SAneesh Bansal #ifdef CONFIG_CHAIN_OF_TRUST
192ed948f4SAneesh Bansal #define CONFIG_CMD_ESBC_VALIDATE
2074eecd82SAneesh Bansal #define CONFIG_CMD_BLOB
212ed948f4SAneesh Bansal #define CONFIG_FSL_SEC_MON
222ed948f4SAneesh Bansal #define CONFIG_SHA_PROG_HW_ACCEL
232ed948f4SAneesh Bansal #define CONFIG_RSA
242ed948f4SAneesh Bansal #define CONFIG_RSA_FREESCALE_EXP
259711f528SAneesh Bansal 
262ed948f4SAneesh Bansal #ifndef CONFIG_FSL_CAAM
272ed948f4SAneesh Bansal #define CONFIG_FSL_CAAM
282ed948f4SAneesh Bansal #endif
292ed948f4SAneesh Bansal 
309711f528SAneesh Bansal #ifndef CONFIG_DM
319711f528SAneesh Bansal #define CONFIG_DM
329711f528SAneesh Bansal #endif
339711f528SAneesh Bansal 
342ed948f4SAneesh Bansal #define CONFIG_KEY_REVOCATION
352ed948f4SAneesh Bansal #ifndef CONFIG_SYS_RAMBOOT
362ed948f4SAneesh Bansal /* The key used for verification of next level images
372ed948f4SAneesh Bansal  * is picked up from an Extension Table which has
382ed948f4SAneesh Bansal  * been verified by the ISBC (Internal Secure boot Code)
392ed948f4SAneesh Bansal  * in boot ROM of the SoC.
402ed948f4SAneesh Bansal  * The feature is only applicable in case of NOR boot and is
412ed948f4SAneesh Bansal  * not applicable in case of RAMBOOT (NAND, SD, SPI).
422ed948f4SAneesh Bansal  */
432ed948f4SAneesh Bansal #define CONFIG_FSL_ISBC_KEY_EXT
442ed948f4SAneesh Bansal #endif
452ed948f4SAneesh Bansal 
46ef6c55a2SAneesh Bansal #ifdef CONFIG_LS1043A
47ef6c55a2SAneesh Bansal /* For LS1043 (ARMv8), ESBC image Address in Header is 64 bit */
48ef6c55a2SAneesh Bansal #define CONFIG_ESBC_ADDR_64BIT
49ef6c55a2SAneesh Bansal #endif
50ef6c55a2SAneesh Bansal 
5198cb0efdSgaurav rana #define CONFIG_EXTRA_ENV \
5298cb0efdSgaurav rana 	"setenv fdt_high 0xcfffffff;"	\
5398cb0efdSgaurav rana 	"setenv initrd_high 0xcfffffff;"	\
5498cb0efdSgaurav rana 	"setenv hwconfig \'fsl_ddr:ctlr_intlv=null,bank_intlv=null\';"
5598cb0efdSgaurav rana 
5698cb0efdSgaurav rana /* The address needs to be modified according to NOR memory map */
5798cb0efdSgaurav rana #define CONFIG_BOOTSCRIPT_HDR_ADDR	0x600a0000
5898cb0efdSgaurav rana 
59*bdc22074SAneesh Bansal #include <config_fsl_chain_trust.h>
60*bdc22074SAneesh Bansal #endif /* #ifdef CONFIG_CHAIN_OF_TRUST */
6198cb0efdSgaurav rana #endif
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