1*98cb0efdSgaurav rana /* 2*98cb0efdSgaurav rana * Copyright 2015 Freescale Semiconductor, Inc. 3*98cb0efdSgaurav rana * 4*98cb0efdSgaurav rana * SPDX-License-Identifier: GPL-2.0+ 5*98cb0efdSgaurav rana */ 6*98cb0efdSgaurav rana 7*98cb0efdSgaurav rana #ifndef __FSL_SECURE_BOOT_H 8*98cb0efdSgaurav rana #define __FSL_SECURE_BOOT_H 9*98cb0efdSgaurav rana 10*98cb0efdSgaurav rana #ifdef CONFIG_SECURE_BOOT 11*98cb0efdSgaurav rana #ifndef CONFIG_FIT_SIGNATURE 12*98cb0efdSgaurav rana 13*98cb0efdSgaurav rana #define CONFIG_EXTRA_ENV \ 14*98cb0efdSgaurav rana "setenv fdt_high 0xcfffffff;" \ 15*98cb0efdSgaurav rana "setenv initrd_high 0xcfffffff;" \ 16*98cb0efdSgaurav rana "setenv hwconfig \'fsl_ddr:ctlr_intlv=null,bank_intlv=null\';" 17*98cb0efdSgaurav rana 18*98cb0efdSgaurav rana /* The address needs to be modified according to NOR memory map */ 19*98cb0efdSgaurav rana #define CONFIG_BOOTSCRIPT_HDR_ADDR 0x600a0000 20*98cb0efdSgaurav rana 21*98cb0efdSgaurav rana #include <config_fsl_secboot.h> 22*98cb0efdSgaurav rana #endif 23*98cb0efdSgaurav rana #endif 24*98cb0efdSgaurav rana 25*98cb0efdSgaurav rana #endif 26