xref: /rk3399_rockchip-uboot/arch/arm/include/asm/fsl_secure_boot.h (revision 2ed948f466b2715a82c25ca25f5839c9bbaea6e3)
198cb0efdSgaurav rana /*
298cb0efdSgaurav rana  * Copyright 2015 Freescale Semiconductor, Inc.
398cb0efdSgaurav rana  *
498cb0efdSgaurav rana  * SPDX-License-Identifier:	GPL-2.0+
598cb0efdSgaurav rana  */
698cb0efdSgaurav rana 
798cb0efdSgaurav rana #ifndef __FSL_SECURE_BOOT_H
898cb0efdSgaurav rana #define __FSL_SECURE_BOOT_H
998cb0efdSgaurav rana 
1098cb0efdSgaurav rana #ifdef CONFIG_SECURE_BOOT
11*2ed948f4SAneesh Bansal #define CONFIG_CMD_ESBC_VALIDATE
12*2ed948f4SAneesh Bansal #define CONFIG_FSL_SEC_MON
13*2ed948f4SAneesh Bansal #define CONFIG_SHA_PROG_HW_ACCEL
14*2ed948f4SAneesh Bansal #define CONFIG_DM
15*2ed948f4SAneesh Bansal #define CONFIG_RSA
16*2ed948f4SAneesh Bansal #define CONFIG_RSA_FREESCALE_EXP
17*2ed948f4SAneesh Bansal #ifndef CONFIG_FSL_CAAM
18*2ed948f4SAneesh Bansal #define CONFIG_FSL_CAAM
19*2ed948f4SAneesh Bansal #endif
20*2ed948f4SAneesh Bansal 
21*2ed948f4SAneesh Bansal #define CONFIG_KEY_REVOCATION
22*2ed948f4SAneesh Bansal #ifndef CONFIG_SYS_RAMBOOT
23*2ed948f4SAneesh Bansal /* The key used for verification of next level images
24*2ed948f4SAneesh Bansal  * is picked up from an Extension Table which has
25*2ed948f4SAneesh Bansal  * been verified by the ISBC (Internal Secure boot Code)
26*2ed948f4SAneesh Bansal  * in boot ROM of the SoC.
27*2ed948f4SAneesh Bansal  * The feature is only applicable in case of NOR boot and is
28*2ed948f4SAneesh Bansal  * not applicable in case of RAMBOOT (NAND, SD, SPI).
29*2ed948f4SAneesh Bansal  */
30*2ed948f4SAneesh Bansal #define CONFIG_FSL_ISBC_KEY_EXT
31*2ed948f4SAneesh Bansal #endif
32*2ed948f4SAneesh Bansal 
3398cb0efdSgaurav rana #ifndef CONFIG_FIT_SIGNATURE
3498cb0efdSgaurav rana 
3598cb0efdSgaurav rana #define CONFIG_EXTRA_ENV \
3698cb0efdSgaurav rana 	"setenv fdt_high 0xcfffffff;"	\
3798cb0efdSgaurav rana 	"setenv initrd_high 0xcfffffff;"	\
3898cb0efdSgaurav rana 	"setenv hwconfig \'fsl_ddr:ctlr_intlv=null,bank_intlv=null\';"
3998cb0efdSgaurav rana 
4098cb0efdSgaurav rana /* The address needs to be modified according to NOR memory map */
4198cb0efdSgaurav rana #define CONFIG_BOOTSCRIPT_HDR_ADDR	0x600a0000
4298cb0efdSgaurav rana 
4398cb0efdSgaurav rana #include <config_fsl_secboot.h>
4498cb0efdSgaurav rana #endif
4598cb0efdSgaurav rana #endif
4698cb0efdSgaurav rana 
4798cb0efdSgaurav rana #endif
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