xref: /rk3399_rockchip-uboot/arch/arm/include/asm/armv8/sec_firmware.h (revision a797f274d7ae806d84b9ececf71f043ca6c1502a)
1b45db3b5SHou Zhiqiang /*
2b45db3b5SHou Zhiqiang  * Copyright 2016 NXP Semiconductor, Inc.
3b45db3b5SHou Zhiqiang  *
4b45db3b5SHou Zhiqiang  * SPDX-License-Identifier:	GPL-2.0+
5b45db3b5SHou Zhiqiang  */
6b45db3b5SHou Zhiqiang 
7b45db3b5SHou Zhiqiang #ifndef __SEC_FIRMWARE_H_
8b45db3b5SHou Zhiqiang #define __SEC_FIRMWARE_H_
9b45db3b5SHou Zhiqiang 
10026f30ecSYuantian Tang #define PSCI_INVALID_VER		0xffffffff
11*a797f274SRuchika Gupta #define SEC_JR3_OFFSET			0x40000
12026f30ecSYuantian Tang 
13b45db3b5SHou Zhiqiang int sec_firmware_init(const void *, u32 *, u32 *);
14b45db3b5SHou Zhiqiang int _sec_firmware_entry(const void *, u32 *, u32 *);
15b45db3b5SHou Zhiqiang bool sec_firmware_is_valid(const void *);
16*a797f274SRuchika Gupta bool sec_firmware_support_hwrng(void);
17*a797f274SRuchika Gupta int sec_firmware_get_random(uint8_t *rand, int bytes);
18*a797f274SRuchika Gupta int fdt_fixup_kaslr(void *fdt);
19daa92644SHou Zhiqiang #ifdef CONFIG_SEC_FIRMWARE_ARMV8_PSCI
20b45db3b5SHou Zhiqiang unsigned int sec_firmware_support_psci_version(void);
21b45db3b5SHou Zhiqiang unsigned int _sec_firmware_support_psci_version(void);
22026f30ecSYuantian Tang #else
sec_firmware_support_psci_version(void)23026f30ecSYuantian Tang static inline unsigned int sec_firmware_support_psci_version(void)
24026f30ecSYuantian Tang {
25026f30ecSYuantian Tang 	return PSCI_INVALID_VER;
26026f30ecSYuantian Tang }
27b45db3b5SHou Zhiqiang #endif
28b45db3b5SHou Zhiqiang 
sec_firmware_used_jobring_offset(void)29*a797f274SRuchika Gupta static inline unsigned int sec_firmware_used_jobring_offset(void)
30*a797f274SRuchika Gupta {
31*a797f274SRuchika Gupta 	return SEC_JR3_OFFSET;
32*a797f274SRuchika Gupta }
33*a797f274SRuchika Gupta 
34b45db3b5SHou Zhiqiang #endif /* __SEC_FIRMWARE_H_ */
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