xref: /rk3399_rockchip-uboot/arch/arm/include/asm/arch-zynqmp/clk.h (revision a359eaa59857079678a2fa5ff0e4c0894de4ee1d)
1 /*
2  * (C) Copyright 2014 - 2015 Xilinx, Inc.
3  * Michal Simek <michal.simek@xilinx.com>
4  *
5  * SPDX-License-Identifier:	GPL-2.0+
6  */
7 
8 #ifndef _ASM_ARCH_CLK_H_
9 #define _ASM_ARCH_CLK_H_
10 
11 unsigned long get_uart_clk(int dev_id);
12 unsigned long zynqmp_get_system_timer_freq(void);
13 
14 #endif /* _ASM_ARCH_CLK_H_ */
15