184c7204bSMichal Simek /* 284c7204bSMichal Simek * (C) Copyright 2014 - 2015 Xilinx, Inc. 384c7204bSMichal Simek * Michal Simek <michal.simek@xilinx.com> 484c7204bSMichal Simek * 584c7204bSMichal Simek * SPDX-License-Identifier: GPL-2.0+ 684c7204bSMichal Simek */ 784c7204bSMichal Simek 884c7204bSMichal Simek #ifndef _ASM_ARCH_CLK_H_ 984c7204bSMichal Simek #define _ASM_ARCH_CLK_H_ 1084c7204bSMichal Simek 1184c7204bSMichal Simek unsigned long get_uart_clk(int dev_id); 12*0785dfd8SMichal Simek unsigned long zynqmp_get_system_timer_freq(void); 1384c7204bSMichal Simek 1484c7204bSMichal Simek #endif /* _ASM_ARCH_CLK_H_ */ 15