124e8bee5SAlison Wang /* 224e8bee5SAlison Wang * Copyright 2013 Freescale Semiconductor, Inc. 324e8bee5SAlison Wang * 41a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 524e8bee5SAlison Wang */ 624e8bee5SAlison Wang 724e8bee5SAlison Wang #ifndef __ASM_ARCH_CLOCK_H 824e8bee5SAlison Wang #define __ASM_ARCH_CLOCK_H 924e8bee5SAlison Wang 1024e8bee5SAlison Wang #include <common.h> 1124e8bee5SAlison Wang 1224e8bee5SAlison Wang enum mxc_clock { 1324e8bee5SAlison Wang MXC_ARM_CLK = 0, 1424e8bee5SAlison Wang MXC_BUS_CLK, 1524e8bee5SAlison Wang MXC_IPG_CLK, 1624e8bee5SAlison Wang MXC_UART_CLK, 1724e8bee5SAlison Wang MXC_ESDHC_CLK, 1824e8bee5SAlison Wang MXC_FEC_CLK, 191221b3d7SAlison Wang MXC_I2C_CLK, 20098d8584SBhuvanchandra DV MXC_DSPI_CLK, 2124e8bee5SAlison Wang }; 2224e8bee5SAlison Wang 2324e8bee5SAlison Wang void enable_ocotp_clk(unsigned char enable); 2424e8bee5SAlison Wang unsigned int mxc_get_clock(enum mxc_clock clk); 25*c40d612bSPeng Fan u32 get_lpuart_clk(void); 2624e8bee5SAlison Wang 2724e8bee5SAlison Wang #define imx_get_fecclk() mxc_get_clock(MXC_FEC_CLK) 2824e8bee5SAlison Wang 2924e8bee5SAlison Wang #endif /* __ASM_ARCH_CLOCK_H */ 30