1*dc89ad14STom Warren /* 2*dc89ad14STom Warren * Copyright (c) 2010-2012, NVIDIA CORPORATION. All rights reserved. 3*dc89ad14STom Warren * 4*dc89ad14STom Warren * This program is free software; you can redistribute it and/or modify it 5*dc89ad14STom Warren * under the terms and conditions of the GNU General Public License, 6*dc89ad14STom Warren * version 2, as published by the Free Software Foundation. 7*dc89ad14STom Warren * 8*dc89ad14STom Warren * This program is distributed in the hope it will be useful, but WITHOUT 9*dc89ad14STom Warren * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 10*dc89ad14STom Warren * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 11*dc89ad14STom Warren * more details. 12*dc89ad14STom Warren * 13*dc89ad14STom Warren * You should have received a copy of the GNU General Public License 14*dc89ad14STom Warren * along with this program. If not, see <http://www.gnu.org/licenses/>. 15*dc89ad14STom Warren */ 16*dc89ad14STom Warren 17*dc89ad14STom Warren #ifndef _TEGRA30_FLOW_H_ 18*dc89ad14STom Warren #define _TEGRA30_FLOW_H_ 19*dc89ad14STom Warren 20*dc89ad14STom Warren struct flow_ctlr { 21*dc89ad14STom Warren u32 halt_cpu_events; 22*dc89ad14STom Warren u32 halt_cop_events; 23*dc89ad14STom Warren u32 cpu_csr; 24*dc89ad14STom Warren u32 cop_csr; 25*dc89ad14STom Warren u32 xrq_events; 26*dc89ad14STom Warren u32 halt_cpu1_events; 27*dc89ad14STom Warren u32 cpu1_csr; 28*dc89ad14STom Warren u32 halt_cpu2_events; 29*dc89ad14STom Warren u32 cpu2_csr; 30*dc89ad14STom Warren u32 halt_cpu3_events; 31*dc89ad14STom Warren u32 cpu3_csr; 32*dc89ad14STom Warren u32 cluster_control; 33*dc89ad14STom Warren }; 34*dc89ad14STom Warren 35*dc89ad14STom Warren #endif /* _TEGRA30_FLOW_H_ */ 36