1*6c43f6c8STom Warren /* 2*6c43f6c8STom Warren * (C) Copyright 2013-2015 3*6c43f6c8STom Warren * NVIDIA Corporation <www.nvidia.com> 4*6c43f6c8STom Warren * 5*6c43f6c8STom Warren * SPDX-License-Identifier: GPL-2.0+ 6*6c43f6c8STom Warren */ 7*6c43f6c8STom Warren 8*6c43f6c8STom Warren /* Tegra210 high-level function multiplexing */ 9*6c43f6c8STom Warren 10*6c43f6c8STom Warren #ifndef _TEGRA210_FUNCMUX_H_ 11*6c43f6c8STom Warren #define _TEGRA210_FUNCMUX_H_ 12*6c43f6c8STom Warren 13*6c43f6c8STom Warren #include <asm/arch-tegra/funcmux.h> 14*6c43f6c8STom Warren 15*6c43f6c8STom Warren /* Configs supported by the func mux */ 16*6c43f6c8STom Warren enum { 17*6c43f6c8STom Warren FUNCMUX_DEFAULT = 0, /* default config */ 18*6c43f6c8STom Warren 19*6c43f6c8STom Warren /* UART configs */ 20*6c43f6c8STom Warren FUNCMUX_UART1_UART1 = 0, 21*6c43f6c8STom Warren FUNCMUX_UART4_UART4 = 0, 22*6c43f6c8STom Warren }; 23*6c43f6c8STom Warren #endif /* _TEGRA210_FUNCMUX_H_ */ 24