12fc65e28STom Warren /* 22fc65e28STom Warren * Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved. 32fc65e28STom Warren * 4*5b8031ccSTom Rini * SPDX-License-Identifier: GPL-2.0 52fc65e28STom Warren */ 62fc65e28STom Warren 72fc65e28STom Warren #ifndef _TEGRA114_FLOW_H_ 82fc65e28STom Warren #define _TEGRA114_FLOW_H_ 92fc65e28STom Warren 102fc65e28STom Warren struct flow_ctlr { 112fc65e28STom Warren u32 halt_cpu_events; 122fc65e28STom Warren u32 halt_cop_events; 132fc65e28STom Warren u32 cpu_csr; 142fc65e28STom Warren u32 cop_csr; 152fc65e28STom Warren u32 xrq_events; 162fc65e28STom Warren u32 halt_cpu1_events; 172fc65e28STom Warren u32 cpu1_csr; 182fc65e28STom Warren u32 halt_cpu2_events; 192fc65e28STom Warren u32 cpu2_csr; 202fc65e28STom Warren u32 halt_cpu3_events; 212fc65e28STom Warren u32 cpu3_csr; 222fc65e28STom Warren u32 cluster_control; 232fc65e28STom Warren }; 242fc65e28STom Warren 252fc65e28STom Warren #endif /* _TEGRA114_FLOW_H_ */ 26