12fc65e28STom Warren /* 22fc65e28STom Warren * Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved. 32fc65e28STom Warren * 4*5b8031ccSTom Rini * SPDX-License-Identifier: GPL-2.0 52fc65e28STom Warren */ 62fc65e28STom Warren 72fc65e28STom Warren /* Tegra114 clock control functions */ 82fc65e28STom Warren 92fc65e28STom Warren #ifndef _TEGRA114_CLOCK_H_ 102fc65e28STom Warren #define _TEGRA114_CLOCK_H_ 112fc65e28STom Warren 122fc65e28STom Warren #include <asm/arch-tegra/clock.h> 132fc65e28STom Warren 142fc65e28STom Warren /* CLK_RST_CONTROLLER_OSC_CTRL_0 */ 152fc65e28STom Warren #define OSC_FREQ_SHIFT 28 162fc65e28STom Warren #define OSC_FREQ_MASK (0xF << OSC_FREQ_SHIFT) 172fc65e28STom Warren 188e1601d9SThierry Reding /* CLK_RST_CONTROLLER_PLLC_MISC_0 */ 198e1601d9SThierry Reding #define PLLC_IDDQ (1 << 26) 208e1601d9SThierry Reding 212fc65e28STom Warren #endif /* _TEGRA114_CLOCK_H_ */ 22