xref: /rk3399_rockchip-uboot/arch/arm/include/asm/arch-sunxi/timer.h (revision 2b679f9fa4a0166917e804a7dbf2d44a7e04f34a)
1 /*
2  * (C) Copyright 2007-2011
3  * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
4  * Tom Cubie <tangliang@allwinnertech.com>
5  *
6  * Configuration settings for the Allwinner A10-evb board.
7  *
8  * SPDX-License-Identifier:	GPL-2.0+
9  */
10 
11 #ifndef _SUNXI_TIMER_H_
12 #define _SUNXI_TIMER_H_
13 
14 #ifndef __ASSEMBLY__
15 
16 #include <linux/types.h>
17 #include <asm/arch/watchdog.h>
18 
19 /* General purpose timer */
20 struct sunxi_timer {
21 	u32 ctl;
22 	u32 inter;
23 	u32 val;
24 	u8 res[4];
25 };
26 
27 /* Audio video sync*/
28 struct sunxi_avs {
29 	u32 ctl;		/* 0x80 */
30 	u32 cnt0;		/* 0x84 */
31 	u32 cnt1;		/* 0x88 */
32 	u32 div;		/* 0x8c */
33 };
34 
35 /* 64 bit counter */
36 struct sunxi_64cnt {
37 	u32 ctl;		/* 0xa0 */
38 	u32 lo;			/* 0xa4 */
39 	u32 hi;			/* 0xa8 */
40 };
41 
42 /* Rtc */
43 struct sunxi_rtc {
44 	u32 ctl;		/* 0x100 */
45 	u32 yymmdd;		/* 0x104 */
46 	u32 hhmmss;		/* 0x108 */
47 };
48 
49 /* Alarm */
50 struct sunxi_alarm {
51 	u32 ddhhmmss;		/* 0x10c */
52 	u32 hhmmss;		/* 0x110 */
53 	u32 en;			/* 0x114 */
54 	u32 irqen;		/* 0x118 */
55 	u32 irqsta;		/* 0x11c */
56 };
57 
58 /* Timer general purpose register */
59 struct sunxi_tgp {
60 	u32 tgpd;
61 };
62 
63 struct sunxi_timer_reg {
64 	u32 tirqen;		/* 0x00 */
65 	u32 tirqsta;		/* 0x04 */
66 	u8 res1[8];
67 	struct sunxi_timer timer[6];	/* We have 6 timers */
68 	u8 res2[16];
69 	struct sunxi_avs avs;
70 	struct sunxi_wdog wdog;	/* 0x90 */
71 	struct sunxi_64cnt cnt64;	/* 0xa0 */
72 	u8 res4[0x58];
73 	struct sunxi_rtc rtc;
74 	struct sunxi_alarm alarm;
75 	struct sunxi_tgp tgp[4];
76 	u8 res5[8];
77 	u32 cpu_cfg;
78 };
79 
80 #endif /* __ASSEMBLY__ */
81 
82 #endif
83