xref: /rk3399_rockchip-uboot/arch/arm/include/asm/arch-stv0991/stv0991_wdru.h (revision 9fa32b12370236a39090d4e42b013910d123db61)
1*9fa32b12SVikas Manocha /*
2*9fa32b12SVikas Manocha  * (C) Copyright 2014
3*9fa32b12SVikas Manocha  * Vikas Manocha, ST Micoelectronics, vikas.manocha@st.com
4*9fa32b12SVikas Manocha  *
5*9fa32b12SVikas Manocha  * SPDX-License-Identifier:	GPL-2.0+
6*9fa32b12SVikas Manocha  */
7*9fa32b12SVikas Manocha 
8*9fa32b12SVikas Manocha #ifndef _STV0991_WD_RST_H
9*9fa32b12SVikas Manocha #define _STV0991_WD_RST_H
10*9fa32b12SVikas Manocha #include <asm/arch-stv0991/hardware.h>
11*9fa32b12SVikas Manocha 
12*9fa32b12SVikas Manocha struct stv0991_wd_ru {
13*9fa32b12SVikas Manocha 	u32 wdru_config;
14*9fa32b12SVikas Manocha 	u32 wdru_ctrl1;
15*9fa32b12SVikas Manocha 	u32 wdru_ctrl2;
16*9fa32b12SVikas Manocha 	u32 wdru_tim;
17*9fa32b12SVikas Manocha 	u32 wdru_count;
18*9fa32b12SVikas Manocha 	u32 wdru_stat;
19*9fa32b12SVikas Manocha 	u32 wdru_wrlock;
20*9fa32b12SVikas Manocha };
21*9fa32b12SVikas Manocha 
22*9fa32b12SVikas Manocha struct stv0991_wd_ru *const stv0991_wd_ru_ptr = \
23*9fa32b12SVikas Manocha 		(struct stv0991_wd_ru *)WDRU_BASE_ADDR;
24*9fa32b12SVikas Manocha 
25*9fa32b12SVikas Manocha /* Watchdog control register */
26*9fa32b12SVikas Manocha #define WDRU_RST_SYS		0x1
27*9fa32b12SVikas Manocha 
28*9fa32b12SVikas Manocha #endif
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