1*9fa32b12SVikas Manocha /* 2*9fa32b12SVikas Manocha * (C) Copyright 2014 3*9fa32b12SVikas Manocha * Vikas Manocha, ST Micoelectronics, vikas.manocha@st.com. 4*9fa32b12SVikas Manocha * 5*9fa32b12SVikas Manocha * SPDX-License-Identifier: GPL-2.0+ 6*9fa32b12SVikas Manocha */ 7*9fa32b12SVikas Manocha 8*9fa32b12SVikas Manocha #ifndef _STV0991_GPT_H 9*9fa32b12SVikas Manocha #define _STV0991_GPT_H 10*9fa32b12SVikas Manocha 11*9fa32b12SVikas Manocha #include <asm/arch-stv0991/hardware.h> 12*9fa32b12SVikas Manocha 13*9fa32b12SVikas Manocha struct gpt_regs { 14*9fa32b12SVikas Manocha u32 cr1; 15*9fa32b12SVikas Manocha u32 cr2; 16*9fa32b12SVikas Manocha u32 reserved_1; 17*9fa32b12SVikas Manocha u32 dier; /* dma_int_en */ 18*9fa32b12SVikas Manocha u32 sr; /* status reg */ 19*9fa32b12SVikas Manocha u32 egr; /* event gen */ 20*9fa32b12SVikas Manocha u32 reserved_2[3]; /* offset 0x18--0x20*/ 21*9fa32b12SVikas Manocha u32 cnt; 22*9fa32b12SVikas Manocha u32 psc; 23*9fa32b12SVikas Manocha u32 arr; 24*9fa32b12SVikas Manocha }; 25*9fa32b12SVikas Manocha 26*9fa32b12SVikas Manocha struct gpt_regs *const gpt1_regs_ptr = 27*9fa32b12SVikas Manocha (struct gpt_regs *) GPTIMER1_BASE_ADDR; 28*9fa32b12SVikas Manocha 29*9fa32b12SVikas Manocha /* Timer control1 register */ 30*9fa32b12SVikas Manocha #define GPT_CR1_CEN 0x0001 31*9fa32b12SVikas Manocha #define GPT_MODE_AUTO_RELOAD (1 << 7) 32*9fa32b12SVikas Manocha 33*9fa32b12SVikas Manocha /* Timer prescalar reg */ 34*9fa32b12SVikas Manocha #define GPT_PRESCALER_128 0x128 35*9fa32b12SVikas Manocha 36*9fa32b12SVikas Manocha /* Auto reload register for free running config */ 37*9fa32b12SVikas Manocha #define GPT_FREE_RUNNING 0xFFFF 38*9fa32b12SVikas Manocha 39*9fa32b12SVikas Manocha /* Timer, HZ specific defines */ 40*9fa32b12SVikas Manocha #define CONFIG_STV0991_HZ 1000 41*9fa32b12SVikas Manocha #define CONFIG_STV0991_HZ_CLOCK (27*1000*1000)/GPT_PRESCALER_128 42*9fa32b12SVikas Manocha 43*9fa32b12SVikas Manocha #endif 44