1dffceb4bSVikas Manocha /* 2dffceb4bSVikas Manocha * (C) Copyright 2016 3dffceb4bSVikas Manocha * Vikas Manocha, ST Micoelectronics, vikas.manocha@st.com. 4dffceb4bSVikas Manocha * 5dffceb4bSVikas Manocha * SPDX-License-Identifier: GPL-2.0+ 6dffceb4bSVikas Manocha */ 7dffceb4bSVikas Manocha 8dffceb4bSVikas Manocha #ifndef __ASM_ARM_ARCH_PERIPH_H 9dffceb4bSVikas Manocha #define __ASM_ARM_ARCH_PERIPH_H 10dffceb4bSVikas Manocha 11dffceb4bSVikas Manocha /* 12dffceb4bSVikas Manocha * Peripherals required for pinmux configuration. List will 13dffceb4bSVikas Manocha * grow with support for more devices getting added. 14dffceb4bSVikas Manocha * Numbering based on interrupt table. 15dffceb4bSVikas Manocha * 16dffceb4bSVikas Manocha */ 17dffceb4bSVikas Manocha enum periph_id { 18dffceb4bSVikas Manocha UART1_GPIOA_9_10 = 0, 19dffceb4bSVikas Manocha UART2_GPIOD_5_6, 20dffceb4bSVikas Manocha }; 21dffceb4bSVikas Manocha 22dffceb4bSVikas Manocha enum periph_clock { 23dffceb4bSVikas Manocha USART1_CLOCK_CFG = 0, 24dffceb4bSVikas Manocha USART2_CLOCK_CFG, 25*14cec061SVikas Manocha GPIO_A_CLOCK_CFG, 26*14cec061SVikas Manocha GPIO_B_CLOCK_CFG, 27*14cec061SVikas Manocha GPIO_C_CLOCK_CFG, 28*14cec061SVikas Manocha GPIO_D_CLOCK_CFG, 29*14cec061SVikas Manocha GPIO_E_CLOCK_CFG, 30*14cec061SVikas Manocha GPIO_F_CLOCK_CFG, 31*14cec061SVikas Manocha GPIO_G_CLOCK_CFG, 32*14cec061SVikas Manocha GPIO_H_CLOCK_CFG, 33*14cec061SVikas Manocha GPIO_I_CLOCK_CFG, 34*14cec061SVikas Manocha GPIO_J_CLOCK_CFG, 35*14cec061SVikas Manocha GPIO_K_CLOCK_CFG, 36dffceb4bSVikas Manocha }; 37dffceb4bSVikas Manocha 38dffceb4bSVikas Manocha #endif /* __ASM_ARM_ARCH_PERIPH_H */ 39