xref: /rk3399_rockchip-uboot/arch/arm/include/asm/arch-stm32/stm32f.h (revision e336fd769dac922cd38a452197b9975f3587013f)
1*e336fd76SPatrice Chotard /*
2*e336fd76SPatrice Chotard  * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
3*e336fd76SPatrice Chotard  * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics.
4*e336fd76SPatrice Chotard  *
5*e336fd76SPatrice Chotard  * SPDX-License-Identifier:	GPL-2.0+
6*e336fd76SPatrice Chotard  */
7*e336fd76SPatrice Chotard 
8*e336fd76SPatrice Chotard #ifndef _ASM_ARCH_STM32F_H
9*e336fd76SPatrice Chotard #define _ASM_ARCH_STM32F_H
10*e336fd76SPatrice Chotard 
11*e336fd76SPatrice Chotard #define STM32_PERIPH_BASE	0x40000000UL
12*e336fd76SPatrice Chotard 
13*e336fd76SPatrice Chotard #define STM32_APB2_PERIPH_BASE	(STM32_PERIPH_BASE + 0x00010000)
14*e336fd76SPatrice Chotard #define STM32_AHB1_PERIPH_BASE	(STM32_PERIPH_BASE + 0x00020000)
15*e336fd76SPatrice Chotard 
16*e336fd76SPatrice Chotard #define STM32_SYSCFG_BASE	(STM32_APB2_PERIPH_BASE + 0x3800)
17*e336fd76SPatrice Chotard #define STM32_FLASH_CNTL_BASE	(STM32_AHB1_PERIPH_BASE + 0x3C00)
18*e336fd76SPatrice Chotard 
19*e336fd76SPatrice Chotard void stm32_flash_latency_cfg(int latency);
20*e336fd76SPatrice Chotard 
21*e336fd76SPatrice Chotard #endif /* _ASM_ARCH_STM32F_H */
22*e336fd76SPatrice Chotard 
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