1 /* 2 * Copyright (C) 2018 Rockchip Electronics Co., Ltd 3 * Author: Zhihuan He <huan.he@rock-chips.com> 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef _ASM_ARCH_SDRAM_RV1108_H 8 #define _ASM_ARCH_SDRAM_RV1108_H 9 10 #include <common.h> 11 #include <ram.h> 12 #include <asm/arch/cru_rv1108.h> 13 #include <asm/arch/grf_rv1108.h> 14 #include <asm/arch/pmu_rv1108.h> 15 #include <asm/arch/sdram_rv1108_pctl_phy.h> 16 17 #define SR_IDLE 3 18 #define PD_IDLE 64 19 #define SDRAM_BEGIN_ADDR 0x60000000 20 #define SDRAM_END_ADDR 0x80000000 21 #define PATTERN (0x5aa5f00f) 22 23 24 struct rv1108_service_msch { 25 u32 id_coreid; 26 u32 id_revisionid; 27 u32 ddrconf; 28 u32 ddrtiming; 29 u32 ddrmode; 30 u32 readlatency; 31 u32 reserveds1[8]; 32 u32 activate; 33 u32 devtodev; 34 }; 35 36 enum { 37 /*memory scheduler ddrtiming*/ 38 BWRATIO_HALF_BW = 0x80000000, 39 BWRATIO_HALF_BW_DIS = 0x0, 40 }; 41 42 struct dram_info { 43 struct rv1108_cru *cru; 44 struct rv1108_grf *grf; 45 struct rv1108_pmu *pmu; 46 struct rv1108_pmu_grf *pmu_grf; 47 struct ddr_phy *phy; 48 struct ddr_pctl *pctl; 49 struct rv1108_service_msch *service_msch; 50 struct ram_info info; 51 }; 52 53 struct sdram_params { 54 u32 ddr_2t_en; 55 struct ddr_config ddr_config_t; 56 struct pll_div dpll_init_cfg; 57 struct ddr_timing ddr_timing_t; 58 }; 59 60 int check_rd_gate(struct dram_info *priv); 61 void enable_low_power(struct dram_info *priv, 62 struct sdram_params *params_priv); 63 void ddr_msch_cfg(struct dram_info *priv, 64 struct sdram_params *params_priv); 65 void ddr_msch_cfg_rbc(struct sdram_params *params_priv, 66 struct dram_info *priv); 67 void ddr_msch_get_max_col(struct dram_info *priv, 68 struct ddr_schedule *sch_priv); 69 void ddr_msch_get_max_row(struct dram_info *priv, 70 struct ddr_schedule *sch_priv); 71 void ddr_phy_dqs_rx_dll_cfg(struct dram_info *priv, u32 freq); 72 void ddr_phy_skew_cfg(struct dram_info *priv); 73 void enable_ddr_io_ret(struct dram_info *priv); 74 void modify_data_training(struct dram_info *priv, 75 struct sdram_params *params_priv); 76 void move_to_config_state(struct dram_info *priv); 77 void pctl_cfg_grf(struct dram_info *priv, 78 struct sdram_params *params_priv); 79 void phy_pctrl_reset_cru(struct dram_info *priv); 80 void rkdclk_init(struct dram_info *priv, 81 struct sdram_params *params_priv); 82 int rv1108_sdram_init(struct dram_info *sdram_priv, 83 struct sdram_params *params_priv); 84 void set_bw_grf(struct dram_info *priv); 85 void set_ds_odt(struct dram_info *priv, 86 struct sdram_params *params_priv); 87 88 89 #endif 90