1 /* 2 * (C) Copyright 2017 Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef __ROCKCHIP_SMCCC_H__ 8 #define __ROCKCHIP_SMCCC_H__ 9 10 /* Rockchip platform SiP call ID */ 11 #define SIP_ATF_VERSION 0x82000001 12 #define SIP_ACCESS_REG 0x82000002 13 #define SIP_SUSPEND_MODE 0x82000003 14 #define SIP_PENDING_CPUS 0x82000004 15 #define SIP_UARTDBG_CFG 0x82000005 16 #define SIP_UARTDBG_CFG64 0xc2000005 17 #define SIP_MCU_EL3FIQ_CFG 0x82000006 18 #define SIP_ACCESS_CHIP_STATE64 0xc2000006 19 #define SIP_SECURE_MEM_CONFIG 0x82000007 20 #define SIP_ACCESS_CHIP_EXTRA_STATE64 0xc2000007 21 #define SIP_DRAM_CONFIG 0x82000008 22 #define SIP_SHARE_MEM 0x82000009 23 #define SIP_SIP_VERSION 0x8200000a 24 #define SIP_REMOTECTL_CFG 0x8200000b 25 #define SIP_VPU_RESET 0x8200000c 26 #define SIP_SOC_BUS_DIV 0x8200000d 27 #define SIP_LAST_LOG 0x8200000e 28 29 #define ROCKCHIP_SIP_CONFIG_DRAM_INIT 0x00 30 #define ROCKCHIP_SIP_CONFIG_DRAM_SET_RATE 0x01 31 #define ROCKCHIP_SIP_CONFIG_DRAM_ROUND_RATE 0x02 32 #define ROCKCHIP_SIP_CONFIG_DRAM_SET_AT_SR 0x03 33 #define ROCKCHIP_SIP_CONFIG_DRAM_GET_BW 0x04 34 #define ROCKCHIP_SIP_CONFIG_DRAM_GET_RATE 0x05 35 #define ROCKCHIP_SIP_CONFIG_DRAM_CLR_IRQ 0x06 36 #define ROCKCHIP_SIP_CONFIG_DRAM_SET_PARAM 0x07 37 #define ROCKCHIP_SIP_CONFIG_DRAM_GET_VERSION 0x08 38 39 /* Rockchip Sip version */ 40 #define SIP_IMPLEMENT_V1 (1) 41 #define SIP_IMPLEMENT_V2 (2) 42 43 /* Error return code */ 44 #define IS_SIP_ERROR(x) (!!(x)) 45 46 #define SIP_RET_SUCCESS 0 47 #define SIP_RET_SMC_UNKNOWN -1 48 #define SIP_RET_NOT_SUPPORTED -2 49 #define SIP_RET_INVALID_PARAMS -3 50 #define SIP_RET_INVALID_ADDRESS -4 51 #define SIP_RET_DENIED -5 52 53 /* SIP_ACCESS_REG: read or write */ 54 #define SECURE_REG_RD 0x0 55 #define SECURE_REG_WR 0x1 56 57 /* Share mem page types */ 58 typedef enum { 59 SHARE_PAGE_TYPE_INVALID = 0, 60 SHARE_PAGE_TYPE_UARTDBG, 61 SHARE_PAGE_TYPE_DDR, 62 SHARE_PAGE_TYPE_MAX, 63 } share_page_type_t; 64 65 /* 66 * sip_smc_set_suspend_mode() - Set U-Boot system suspend state before trap to trust. 67 * 68 * see kernel-4.4: drivers/soc/rockchip/rockchip_pm_config.c 69 */ 70 int sip_smc_set_suspend_mode(unsigned long ctrl, 71 unsigned long config1, 72 unsigned long config2); 73 74 /* 75 * sip_smc_dram() - Set dram configure for trust. 76 * 77 * see: ./drivers/ram/rockchip/rockchip_dmc.c 78 */ 79 struct arm_smccc_res sip_smc_dram(unsigned long arg0, 80 unsigned long arg1, 81 unsigned long arg2); 82 83 /* 84 * sip_smc_request_share_mem() - Request share memory from trust. 85 * 86 * @page_num: page numbers 87 * @page_type: page type, see: share_page_type_t 88 * 89 * @return arm_smccc_res structure, res.a0 equals 0 on success(res.a1 contains 90 * share memory base address), otherwise failed. 91 */ 92 struct arm_smccc_res sip_smc_request_share_mem(unsigned long page_num, 93 share_page_type_t page_type); 94 95 /* 96 * sip_smc_secure_reg_read() - Read secure info(ddr/register...) from trust. 97 * 98 * @addr_phy: address to read 99 * 100 * @return arm_smccc_res structure, res.a0 equals 0 on success(res.a1 contains 101 * valid data), otherwise failed. 102 */ 103 struct arm_smccc_res sip_smc_secure_reg_read(unsigned long addr_phy); 104 105 /* 106 * sip_smc_secure_reg_write() - Write data to trust secure info(ddr/register...). 107 * 108 * @addr_phy: address to write 109 * @val: value to write 110 * 111 * @return 0 on success, otherwise failed. 112 */ 113 int sip_smc_secure_reg_write(unsigned long addr_phy, unsigned long val); 114 115 /* 116 * sip_smc_set_sip_version() - Set sip version to trust. 117 * 118 * @return 0 on success, otherwise failed. 119 */ 120 int sip_smc_set_sip_version(unsigned long version); 121 122 /* 123 * sip_smc_get_sip_version() - Get sip version to trust. 124 * 125 * @return arm_smccc_res structure, res.a0 equals 0 on success(res.a1 contains 126 * sip version), otherwise failed. 127 */ 128 struct arm_smccc_res sip_smc_get_sip_version(void); 129 130 /* 131 * psci_cpu_on() - Standard ARM PSCI cpu on call. 132 * 133 * @cpuid: cpu id 134 * @entry_point: boot entry point 135 * 136 * @return 0 on success, otherwise failed. 137 */ 138 int psci_cpu_on(unsigned long cpuid, unsigned long entry_point); 139 140 #ifdef CONFIG_ARM_CPU_SUSPEND 141 /* 142 * psci_system_suspend() - Standard ARM PSCI system suspend call. 143 * 144 * @unused: unused now, always 0 recommend 145 * 146 * @return 0 on success, otherwise failed. 147 */ 148 int psci_system_suspend(unsigned long unused); 149 #endif 150 151 #endif 152