1 /* 2 * (C) Copyright 2017 Rockchip Electronics Co., Ltd 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef __ROCKCHIP_SMCCC_H__ 8 #define __ROCKCHIP_SMCCC_H__ 9 10 #include <linux/arm-smccc.h> 11 12 /* Rockchip platform SiP call ID */ 13 #define SIP_ATF_VERSION 0x82000001 14 #define SIP_ACCESS_REG 0x82000002 15 #define SIP_SUSPEND_MODE 0x82000003 16 #define SIP_PENDING_CPUS 0x82000004 17 #define SIP_UARTDBG_CFG 0x82000005 18 #define SIP_UARTDBG_CFG64 0xc2000005 19 #define SIP_MCU_EL3FIQ_CFG 0x82000006 20 #define SIP_ACCESS_CHIP_STATE64 0xc2000006 21 #define SIP_SECURE_MEM_CONFIG 0x82000007 22 #define SIP_ACCESS_CHIP_EXTRA_STATE64 0xc2000007 23 #define SIP_DRAM_CONFIG 0x82000008 24 #define SIP_SHARE_MEM 0x82000009 25 #define SIP_SIP_VERSION 0x8200000a 26 #define SIP_REMOTECTL_CFG 0x8200000b 27 #define SIP_VPU_RESET 0x8200000c 28 #define SIP_SOC_BUS_DIV 0x8200000d 29 #define SIP_LAST_LOG 0x8200000e 30 31 #define ROCKCHIP_SIP_CONFIG_DRAM_INIT 0x00 32 #define ROCKCHIP_SIP_CONFIG_DRAM_SET_RATE 0x01 33 #define ROCKCHIP_SIP_CONFIG_DRAM_ROUND_RATE 0x02 34 #define ROCKCHIP_SIP_CONFIG_DRAM_SET_AT_SR 0x03 35 #define ROCKCHIP_SIP_CONFIG_DRAM_GET_BW 0x04 36 #define ROCKCHIP_SIP_CONFIG_DRAM_GET_RATE 0x05 37 #define ROCKCHIP_SIP_CONFIG_DRAM_CLR_IRQ 0x06 38 #define ROCKCHIP_SIP_CONFIG_DRAM_SET_PARAM 0x07 39 #define ROCKCHIP_SIP_CONFIG_DRAM_GET_VERSION 0x08 40 41 /* Rockchip Sip version */ 42 #define SIP_IMPLEMENT_V1 (1) 43 #define SIP_IMPLEMENT_V2 (2) 44 45 /* Error return code */ 46 #define IS_SIP_ERROR(x) (!!(x)) 47 48 #define SIP_RET_SUCCESS 0 49 #define SIP_RET_SMC_UNKNOWN -1 50 #define SIP_RET_NOT_SUPPORTED -2 51 #define SIP_RET_INVALID_PARAMS -3 52 #define SIP_RET_INVALID_ADDRESS -4 53 #define SIP_RET_DENIED -5 54 55 /* SIP_ACCESS_REG: read or write */ 56 #define SECURE_REG_RD 0x0 57 #define SECURE_REG_WR 0x1 58 59 /* Share mem page types */ 60 typedef enum { 61 SHARE_PAGE_TYPE_INVALID = 0, 62 SHARE_PAGE_TYPE_UARTDBG, 63 SHARE_PAGE_TYPE_DDR, 64 SHARE_PAGE_TYPE_MAX, 65 } share_page_type_t; 66 67 /* 68 * sip_smc_set_suspend_mode() - Set U-Boot system suspend state before trap to trust. 69 * 70 * see kernel-4.4: drivers/soc/rockchip/rockchip_pm_config.c 71 */ 72 int sip_smc_set_suspend_mode(unsigned long ctrl, 73 unsigned long config1, 74 unsigned long config2); 75 76 /* 77 * sip_smc_dram() - Set dram configure for trust. 78 * 79 * see: ./drivers/ram/rockchip/rockchip_dmc.c 80 */ 81 struct arm_smccc_res sip_smc_dram(unsigned long arg0, 82 unsigned long arg1, 83 unsigned long arg2); 84 85 /* 86 * sip_smc_request_share_mem() - Request share memory from trust. 87 * 88 * @page_num: page numbers 89 * @page_type: page type, see: share_page_type_t 90 * 91 * @return arm_smccc_res structure, res.a0 equals 0 on success(res.a1 contains 92 * share memory base address), otherwise failed. 93 */ 94 struct arm_smccc_res sip_smc_request_share_mem(unsigned long page_num, 95 share_page_type_t page_type); 96 97 /* 98 * sip_smc_secure_reg_read() - Read secure info(ddr/register...) from trust. 99 * 100 * @addr_phy: address to read 101 * 102 * @return arm_smccc_res structure, res.a0 equals 0 on success(res.a1 contains 103 * valid data), otherwise failed. 104 */ 105 struct arm_smccc_res sip_smc_secure_reg_read(unsigned long addr_phy); 106 107 /* 108 * sip_smc_secure_reg_write() - Write data to trust secure info(ddr/register...). 109 * 110 * @addr_phy: address to write 111 * @val: value to write 112 * 113 * @return 0 on success, otherwise failed. 114 */ 115 int sip_smc_secure_reg_write(unsigned long addr_phy, unsigned long val); 116 117 /* 118 * sip_smc_set_sip_version() - Set sip version to trust. 119 * 120 * @return 0 on success, otherwise failed. 121 */ 122 int sip_smc_set_sip_version(unsigned long version); 123 124 /* 125 * sip_smc_get_sip_version() - Get sip version to trust. 126 * 127 * @return arm_smccc_res structure, res.a0 equals 0 on success(res.a1 contains 128 * sip version), otherwise failed. 129 */ 130 struct arm_smccc_res sip_smc_get_sip_version(void); 131 132 /* 133 * psci_cpu_on() - Standard ARM PSCI cpu on call. 134 * 135 * @cpuid: cpu id 136 * @entry_point: boot entry point 137 * 138 * @return 0 on success, otherwise failed. 139 */ 140 int psci_cpu_on(unsigned long cpuid, unsigned long entry_point); 141 142 #ifdef CONFIG_ARM_CPU_SUSPEND 143 /* 144 * psci_system_suspend() - Standard ARM PSCI system suspend call. 145 * 146 * @unused: unused now, always 0 recommend 147 * 148 * @return 0 on success, otherwise failed. 149 */ 150 int psci_system_suspend(unsigned long unused); 151 #endif 152 153 #endif 154