1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * (C) Copyright 2022 Rockchip Electronics Co., Ltd 4 * 5 */ 6 7 #ifndef _RK_CFG_H_ 8 #define _RK_CFG_H_ 9 10 /* META storage layout */ 11 /***************************/ /* ----- ITEM start -----*/ 12 /** META_HEAD **/ 13 /***************************/ 14 /** ITEM 1 **/ 15 /***************************/ 16 /** ITEM 2 **/ 17 /***************************/ 18 /** ITEM 3 **/ 19 /***************************/ 20 /** .... **/ 21 /***************************/ /* --- ITEM backup start 32KB ---*/ 22 /** ITEM 1 BACKUP **/ 23 /***************************/ 24 /** ITEM 2 BACKUP **/ 25 /***************************/ 26 /** ITEM 3 BACKUP **/ 27 /***************************/ 28 /** .... **/ 29 /***************************/ 30 /** META_END **/ 31 /***************************/ /* ----- ITEM backup end -----*/ 32 /** IQ FILE BIN **/ /* 320K sensor iq file bin */ 33 /***************************/ 34 35 /* META memory layout */ 36 /***************************/ /* ----- ITEM start -----*/ 37 /** META_HEAD **/ 38 /***************************/ 39 /** ITEM 1 **/ 40 /***************************/ 41 /** ITEM 2 **/ 42 /***************************/ 43 /** ITEM 3 **/ 44 /***************************/ 45 /** .... **/ 46 /***************************/ /* --- ITEM backup start 32KB ---*/ 47 /** ITEM 1 BACKUP **/ 48 /***************************/ 49 /** ITEM 2 BACKUP **/ 50 /***************************/ 51 /** ITEM 3 BACKUP **/ 52 /***************************/ 53 /** .... **/ 54 /***************************/ 55 /** META_END **/ 56 /***************************/ /* ----- ITEM backup end -----*/ 57 /** IQ FILE BIN **/ /* 320K sensor iq file bin */ 58 /***************************/ 59 60 #define RK_META 0x544d4b52 61 #define RK_META_END 0x55aabbcc 62 #define RK_CMDLINE 0x4c444d43 63 64 #define ITEM_SIZE (1 * 1024) 65 #define MAX_HEAD_SIZE 4 66 #define MAX_META_SEGMENT_SIZE (64 * 1024) 67 #define BACKUP_META_SIZE (MAX_META_SEGMENT_SIZE / 2) 68 #define META_INFO_HEAD_OFFSET 0 69 #define META_INFO_SIZE ITEM_SIZE 70 #define PARAM_SHARE2KERNEL_OFFSET (META_INFO_HEAD_OFFSET + META_INFO_SIZE) 71 #define PARAM_SHARE2KERNEL_SIZE (ITEM_SIZE) 72 #define SENSOR_INIT_OFFSET (PARAM_SHARE2KERNEL_OFFSET + PARAM_SHARE2KERNEL_SIZE) 73 #define SENSOR_INIT_MAX_SIZE ITEM_SIZE 74 #define CMDLINE_OFFSET (SENSOR_INIT_OFFSET + SENSOR_INIT_MAX_SIZE) 75 #define CMDLINE_MAX_SIZE ITEM_SIZE 76 #define AE_TABLE_OFFSET (CMDLINE_OFFSET + CMDLINE_MAX_SIZE) 77 #define AE_TABLE_MAX_SIZE ITEM_SIZE 78 79 #define APP_PARAM_OFFSET (AE_TABLE_OFFSET + AE_TABLE_MAX_SIZE) 80 #define APP_PARAM_MAX_SIZE ITEM_SIZE 81 82 #define SECONDARY_SENSOR_INIT_OFFSET (APP_PARAM_OFFSET + APP_PARAM_MAX_SIZE) 83 #define SECONDARY_SENSOR_INIT_MAX_SIZE ITEM_SIZE 84 85 #define WAKEUP_PARAM_OFFSET (SECONDARY_SENSOR_INIT_OFFSET + SECONDARY_SENSOR_INIT_MAX_SIZE) 86 #define WAKEUP_PARAM_MAX_SIZE ITEM_SIZE 87 88 #define WAKEUP_AOV_PARAM_OFFSET (WAKEUP_PARAM_OFFSET + WAKEUP_PARAM_MAX_SIZE) 89 #define WAKEUP_AOV_PARAM_MAX_SIZE ITEM_SIZE 90 91 #define SENSOR_IQ_BIN_OFFSET (MAX_META_SEGMENT_SIZE) 92 93 /* 512 - sizeof(tag/load/size/comp_type/comp_size/comp_off/crc32/meta_flags/iq_item_size/total_part_num/part_flag/part_reserved_size/iqbin_max_size) */ 94 #define META_HEAD_RESERVED_SIZE (115*4) 95 #define META_READ_DONE_FLAG (1 << 0) 96 97 #define AE_TABLE_SHARE2KERNEL_OFFSET (PARAM_SHARE2KERNEL_OFFSET) 98 99 #define META_COMPRESS_TYPE_GZ 0x1 100 101 struct meta_head { 102 uint32_t tag; 103 uint32_t load; 104 uint32_t size; 105 uint32_t comp_type; 106 uint32_t comp_size; 107 uint32_t comp_off; 108 uint32_t iq_item_size; 109 uint32_t total_part_num; 110 uint32_t part_flag; 111 uint32_t part_reserved_size; 112 uint32_t iqbin_max_size; 113 uint8_t reserved[META_HEAD_RESERVED_SIZE]; 114 uint32_t crc32; 115 uint32_t meta_flags; 116 }; 117 118 #define MAX_CMDLINE_LENGTH (ITEM_SIZE - 8) /* 1024 - sizeof(tag/crc32) */ 119 struct cmdline_info { 120 uint32_t tag; 121 uint8_t data[MAX_CMDLINE_LENGTH]; 122 uint32_t crc32; 123 }; 124 125 void rk_meta_bootargs_append(void *fdt); 126 #endif 127