xref: /rk3399_rockchip-uboot/arch/arm/include/asm/arch-rockchip/grf_rk322x.h (revision ae0a27344f0b609dd6d4a3a14b2171b533d8db0b)
15cc9d31aSKever Yang /*
25cc9d31aSKever Yang  * (C) Copyright 2017 Rockchip Electronics Co., Ltd.
35cc9d31aSKever Yang  *
45cc9d31aSKever Yang  * SPDX-License-Identifier:     GPL-2.0+
55cc9d31aSKever Yang  */
65cc9d31aSKever Yang #ifndef _ASM_ARCH_GRF_RK322X_H
75cc9d31aSKever Yang #define _ASM_ARCH_GRF_RK322X_H
85cc9d31aSKever Yang 
95cc9d31aSKever Yang #include <common.h>
105cc9d31aSKever Yang 
115cc9d31aSKever Yang struct rk322x_grf {
125cc9d31aSKever Yang 	unsigned int gpio0a_iomux;
135cc9d31aSKever Yang 	unsigned int gpio0b_iomux;
145cc9d31aSKever Yang 	unsigned int gpio0c_iomux;
155cc9d31aSKever Yang 	unsigned int gpio0d_iomux;
165cc9d31aSKever Yang 
175cc9d31aSKever Yang 	unsigned int gpio1a_iomux;
185cc9d31aSKever Yang 	unsigned int gpio1b_iomux;
195cc9d31aSKever Yang 	unsigned int gpio1c_iomux;
205cc9d31aSKever Yang 	unsigned int gpio1d_iomux;
215cc9d31aSKever Yang 
225cc9d31aSKever Yang 	unsigned int gpio2a_iomux;
235cc9d31aSKever Yang 	unsigned int gpio2b_iomux;
245cc9d31aSKever Yang 	unsigned int gpio2c_iomux;
255cc9d31aSKever Yang 	unsigned int gpio2d_iomux;
265cc9d31aSKever Yang 
275cc9d31aSKever Yang 	unsigned int gpio3a_iomux;
285cc9d31aSKever Yang 	unsigned int gpio3b_iomux;
295cc9d31aSKever Yang 	unsigned int gpio3c_iomux;
305cc9d31aSKever Yang 	unsigned int gpio3d_iomux;
315cc9d31aSKever Yang 
325cc9d31aSKever Yang 	unsigned int reserved1[4];
335cc9d31aSKever Yang 	unsigned int con_iomux;
345cc9d31aSKever Yang 	unsigned int reserved2[(0x100 - 0x50) / 4 - 1];
355cc9d31aSKever Yang 	unsigned int gpio0_p[4];
365cc9d31aSKever Yang 	unsigned int gpio1_p[4];
375cc9d31aSKever Yang 	unsigned int gpio2_p[4];
385cc9d31aSKever Yang 	unsigned int gpio3_p[4];
395cc9d31aSKever Yang 	unsigned int reserved3[(0x200 - 0x13c) / 4 - 1];
405cc9d31aSKever Yang 	unsigned int gpio0_e[4];
415cc9d31aSKever Yang 	unsigned int gpio1_e[4];
425cc9d31aSKever Yang 	unsigned int gpio2_e[4];
435cc9d31aSKever Yang 	unsigned int gpio3_e[4];
445cc9d31aSKever Yang 	unsigned int reserved4[(0x400 - 0x23c) / 4 - 1];
455cc9d31aSKever Yang 	unsigned int soc_con[7];
465cc9d31aSKever Yang 	unsigned int reserved5[(0x480 - 0x418) / 4 - 1];
475cc9d31aSKever Yang 	unsigned int soc_status[3];
485cc9d31aSKever Yang 	unsigned int chip_id;
495cc9d31aSKever Yang 	unsigned int reserved6[(0x500 - 0x48c) / 4 - 1];
505cc9d31aSKever Yang 	unsigned int cpu_con[4];
515cc9d31aSKever Yang 	unsigned int reserved7[4];
525cc9d31aSKever Yang 	unsigned int cpu_status[2];
535cc9d31aSKever Yang 	unsigned int reserved8[(0x5c8 - 0x524) / 4 - 1];
545cc9d31aSKever Yang 	unsigned int os_reg[8];
555cc9d31aSKever Yang 	unsigned int reserved9[(0x604 - 0x5e4) / 4 - 1];
565cc9d31aSKever Yang 	unsigned int ddrc_stat;
57*dd866228SDavid Wu 	unsigned int reserved10[(0x680 - 0x604) / 4 - 1];
58*dd866228SDavid Wu 	unsigned int sig_detect_con[2];
59*dd866228SDavid Wu 	unsigned int reserved11[(0x690 - 0x684) / 4 - 1];
60*dd866228SDavid Wu 	unsigned int sig_detect_status[2];
61*dd866228SDavid Wu 	unsigned int reserved12[(0x6a0 - 0x694) / 4 - 1];
62*dd866228SDavid Wu 	unsigned int sig_detect_clr[2];
63*dd866228SDavid Wu 	unsigned int reserved13[(0x6b0 - 0x6a4) / 4 - 1];
64*dd866228SDavid Wu 	unsigned int emmc_det;
65*dd866228SDavid Wu 	unsigned int reserved14[(0x700 - 0x6b0) / 4 - 1];
66*dd866228SDavid Wu 	unsigned int host0_con[3];
67*dd866228SDavid Wu 	unsigned int reserved15;
68*dd866228SDavid Wu 	unsigned int host1_con[3];
69*dd866228SDavid Wu 	unsigned int reserved16;
70*dd866228SDavid Wu 	unsigned int host2_con[3];
71*dd866228SDavid Wu 	unsigned int reserved17[(0x760 - 0x728) / 4 - 1];
72*dd866228SDavid Wu 	unsigned int usbphy0_con[27];
73*dd866228SDavid Wu 	unsigned int reserved18[(0x800 - 0x7c8) / 4 - 1];
74*dd866228SDavid Wu 	unsigned int usbphy1_con[27];
75*dd866228SDavid Wu 	unsigned int reserved19[(0x880 - 0x868) / 4 - 1];
76*dd866228SDavid Wu 	unsigned int otg_con0;
77*dd866228SDavid Wu 	unsigned int uoc_status0;
78*dd866228SDavid Wu 	unsigned int reserved20[(0x900 - 0x884) / 4 - 1];
79*dd866228SDavid Wu 	unsigned int mac_con[2];
80*dd866228SDavid Wu 	unsigned int reserved21[(0xb00 - 0x904) / 4 - 1];
81*dd866228SDavid Wu 	unsigned int macphy_con[4];
82*dd866228SDavid Wu 	unsigned int macphy_status;
835cc9d31aSKever Yang };
845cc9d31aSKever Yang check_member(rk322x_grf, ddrc_stat, 0x604);
855cc9d31aSKever Yang 
865cc9d31aSKever Yang struct rk322x_sgrf {
875cc9d31aSKever Yang 	unsigned int soc_con[11];
885cc9d31aSKever Yang 	unsigned int busdmac_con[4];
895cc9d31aSKever Yang };
905cc9d31aSKever Yang 
91*dd866228SDavid Wu /* GRF_MACPHY_CON0 */
92*dd866228SDavid Wu enum {
93*dd866228SDavid Wu 	MACPHY_CFG_ENABLE_SHIFT = 0,
94*dd866228SDavid Wu 	MACPHY_CFG_ENABLE_MASK  = 1 << MACPHY_CFG_ENABLE_SHIFT,
95*dd866228SDavid Wu };
965cc9d31aSKever Yang #endif
97