1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Rockchip Electronics Co., Ltd. 4 * 5 */ 6 7 #ifndef __ASM_ARCH_CPU_H 8 #define __ASM_ARCH_CPU_H 9 10 #include <asm/io.h> 11 12 #define ROCKCHIP_CPU_MASK 0xffff0000 13 #define ROCKCHIP_CPU_RK312X 0x31260000 14 #define ROCKCHIP_CPU_RK3288 0x32880000 15 #define ROCKCHIP_CPU_RK3308 0x33080000 16 17 #define ROCKCHIP_SOC_MASK (ROCKCHIP_CPU_MASK | 0xff) 18 #define ROCKCHIP_SOC_RK3126 (ROCKCHIP_CPU_RK312X | 0x00) 19 #define ROCKCHIP_SOC_RK3126B (ROCKCHIP_CPU_RK312X | 0x10) 20 #define ROCKCHIP_SOC_RK3126C (ROCKCHIP_CPU_RK312X | 0x20) 21 #define ROCKCHIP_SOC_RK3128 (ROCKCHIP_CPU_RK312X | 0x01) 22 #define ROCKCHIP_SOC_RK3288 (ROCKCHIP_CPU_RK3288 | 0x00) 23 #define ROCKCHIP_SOC_RK3288W (ROCKCHIP_CPU_RK3288 | 0x01) 24 #define ROCKCHIP_SOC_RK3308 (ROCKCHIP_CPU_RK3308 | 0x00) 25 #define ROCKCHIP_SOC_RK3308B (ROCKCHIP_CPU_RK3308 | 0x01) 26 27 static inline int rockchip_soc_id(void) 28 { 29 #if defined(CONFIG_ROCKCHIP_RK3288) 30 /* RK3288W HDMI Revision ID is 0x1A */ 31 if (readl(0xFF980004) == 0x1A) 32 return ROCKCHIP_SOC_RK3288W; 33 else 34 return ROCKCHIP_SOC_RK3288; 35 #elif defined(CONFIG_ROCKCHIP_RK3308) 36 /* 37 * The CHIP_ID is stored in GRF_CHIP_ID: 38 * RK3308: 0xcea (3306 in decimal) 39 * RK3308B: 0x3308 40 * 41 */ 42 if (readl(0xFF000800) == 3306) 43 return ROCKCHIP_SOC_RK3308; 44 else 45 return ROCKCHIP_SOC_RK3308B; 46 #else 47 return 0; 48 #endif 49 } 50 51 #define ROCKCHIP_SOC(id, ID) \ 52 static inline bool soc_is_##id(void) \ 53 { \ 54 int soc_id = rockchip_soc_id(); \ 55 if (soc_id) \ 56 return ((soc_id & ROCKCHIP_SOC_MASK) == ROCKCHIP_SOC_ ##ID); \ 57 return false; \ 58 } 59 60 ROCKCHIP_SOC(rk3126, RK3126) 61 ROCKCHIP_SOC(rk3126b, RK3126B) 62 ROCKCHIP_SOC(rk3126c, RK3126C) 63 ROCKCHIP_SOC(rk3128, RK3128) 64 ROCKCHIP_SOC(rk3288, RK3288) 65 ROCKCHIP_SOC(rk3288w, RK3288W) 66 ROCKCHIP_SOC(rk3308, RK3308) 67 ROCKCHIP_SOC(rk3308b, RK3308B) 68 69 #endif 70