1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Rockchip Electronics Co., Ltd. 4 * 5 */ 6 7 #ifndef __ASM_ARCH_CPU_H 8 #define __ASM_ARCH_CPU_H 9 10 #include <asm/io.h> 11 #include <dm/device.h> 12 13 #define ROCKCHIP_CPU_MASK 0xffff0000 14 #define ROCKCHIP_CPU_PX30 0x33260000 15 #define ROCKCHIP_CPU_RK312X 0x31260000 16 #define ROCKCHIP_CPU_RK3288 0x32880000 17 #define ROCKCHIP_CPU_RK3308 0x33080000 18 #define ROCKCHIP_CPU_RK3566 0x35660000 19 #define ROCKCHIP_CPU_RK3568 0x35680000 20 21 #define ROCKCHIP_SOC_MASK (ROCKCHIP_CPU_MASK | 0xff) 22 #define ROCKCHIP_SOC_PX30 (ROCKCHIP_CPU_PX30 | 0x00) 23 #define ROCKCHIP_SOC_PX30S (ROCKCHIP_CPU_PX30 | 0x01) 24 #define ROCKCHIP_SOC_RK3126 (ROCKCHIP_CPU_RK312X | 0x00) 25 #define ROCKCHIP_SOC_RK3126B (ROCKCHIP_CPU_RK312X | 0x10) 26 #define ROCKCHIP_SOC_RK3126C (ROCKCHIP_CPU_RK312X | 0x20) 27 #define ROCKCHIP_SOC_RK3128 (ROCKCHIP_CPU_RK312X | 0x01) 28 #define ROCKCHIP_SOC_RK3288 (ROCKCHIP_CPU_RK3288 | 0x00) 29 #define ROCKCHIP_SOC_RK3288W (ROCKCHIP_CPU_RK3288 | 0x01) 30 #define ROCKCHIP_SOC_RK3308 (ROCKCHIP_CPU_RK3308 | 0x00) 31 #define ROCKCHIP_SOC_RK3308B (ROCKCHIP_CPU_RK3308 | 0x01) 32 #define ROCKCHIP_SOC_RK3308BS (ROCKCHIP_CPU_RK3308 | 0x02) 33 #define ROCKCHIP_SOC_RK3566 (ROCKCHIP_CPU_RK3566 | 0x00) 34 #define ROCKCHIP_SOC_RK3566PRO (ROCKCHIP_CPU_RK3566 | 0x01) 35 #define ROCKCHIP_SOC_RK3568 (ROCKCHIP_CPU_RK3568 | 0x00) 36 37 static inline unsigned long rockchip_get_cpu_version(void) 38 { 39 #if defined(CONFIG_ROCKCHIP_RK3568) 40 #define PMUGRF_SOC_CON15 0xfdc20100 41 if (readl(PMUGRF_SOC_CON15) & GENMASK(15, 14)) 42 return 1; 43 else 44 return 0; 45 #else 46 return 0; 47 #endif 48 } 49 50 static inline int rockchip_soc_id(void) 51 { 52 #if defined(CONFIG_ROCKCHIP_PX30) 53 u32 v = readl(0xFF630004); 54 55 /* The CHIP_ID is stored in DDRGRF CON1[15:14] 56 * PX30: 0x00 57 * PX30S: 0x03 58 */ 59 if (((v >> 14) & 0x03) == 0x03) 60 return ROCKCHIP_SOC_PX30S; 61 else 62 return ROCKCHIP_SOC_PX30; 63 #elif defined(CONFIG_ROCKCHIP_RK3288) 64 /* RK3288W HDMI Revision ID is 0x1A */ 65 if (readl(0xFF980004) == 0x1A) 66 return ROCKCHIP_SOC_RK3288W; 67 else 68 return ROCKCHIP_SOC_RK3288; 69 #elif defined(CONFIG_ROCKCHIP_RK3308) 70 /* 71 * The CHIP_ID is stored in GRF_CHIP_ID: 72 * RK3308: 0xcea (3306 in decimal) 73 * RK3308B: 0x3308 74 * RK3308BS: 0x3308c 75 */ 76 u32 v = readl(0xFF000800); 77 78 if (v == 3306) 79 return ROCKCHIP_SOC_RK3308; 80 else if (v == 0x3308c) 81 return ROCKCHIP_SOC_RK3308BS; 82 else 83 return ROCKCHIP_SOC_RK3308B; 84 #elif defined(CONFIG_ROCKCHIP_RK3568) 85 if (of_machine_is_compatible("rockchip,rk3566")) 86 return ROCKCHIP_SOC_RK3566; 87 else 88 return ROCKCHIP_SOC_RK3568; 89 #else 90 return 0; 91 #endif 92 } 93 94 int board_soc_id(void); 95 void board_soc_id_init(int id); 96 97 #define ROCKCHIP_SOC(id, ID) \ 98 static inline bool soc_is_##id(void) \ 99 { \ 100 int soc_id = rockchip_soc_id(); \ 101 int bsoc_id = board_soc_id(); \ 102 if (bsoc_id) \ 103 return ((bsoc_id & ROCKCHIP_SOC_MASK) == ROCKCHIP_SOC_ ##ID); \ 104 if (soc_id) \ 105 return ((soc_id & ROCKCHIP_SOC_MASK) == ROCKCHIP_SOC_ ##ID); \ 106 return false; \ 107 } 108 109 ROCKCHIP_SOC(px30, PX30) 110 ROCKCHIP_SOC(px30s, PX30S) 111 ROCKCHIP_SOC(rk3126, RK3126) 112 ROCKCHIP_SOC(rk3126b, RK3126B) 113 ROCKCHIP_SOC(rk3126c, RK3126C) 114 ROCKCHIP_SOC(rk3128, RK3128) 115 ROCKCHIP_SOC(rk3288, RK3288) 116 ROCKCHIP_SOC(rk3288w, RK3288W) 117 ROCKCHIP_SOC(rk3308, RK3308) 118 ROCKCHIP_SOC(rk3308b, RK3308B) 119 ROCKCHIP_SOC(rk3308bs, RK3308BS) 120 ROCKCHIP_SOC(rk3566, RK3566) 121 ROCKCHIP_SOC(rk3566pro, RK3566PRO) 122 ROCKCHIP_SOC(rk3568, RK3568) 123 124 #endif 125