xref: /rk3399_rockchip-uboot/arch/arm/include/asm/arch-rockchip/bootrom.h (revision b2b4c2f52306f77e9c04f19015bd6573c3ad8c4a)
1aade077eSHeiko Stübner /*
2aade077eSHeiko Stübner  * (C) Copyright 2017 Heiko Stuebner <heiko@sntech.de>
33513fb1eSPhilipp Tomsich  * (C) Copyright 2017 Theobroma Systems Design und Consulting GmbH
4aade077eSHeiko Stübner  *
5aade077eSHeiko Stübner  * SPDX-License-Identifier:	GPL-2.0
6aade077eSHeiko Stübner  */
7aade077eSHeiko Stübner 
8aade077eSHeiko Stübner #ifndef _ASM_ARCH_BOOTROM_H
9aade077eSHeiko Stübner #define _ASM_ARCH_BOOTROM_H
10aade077eSHeiko Stübner 
11aade077eSHeiko Stübner /*
12aade077eSHeiko Stübner  * Saved Stack pointer address.
13aade077eSHeiko Stübner  * Access might be needed in some special cases.
14aade077eSHeiko Stübner  */
15aade077eSHeiko Stübner extern u32 SAVE_SP_ADDR;
16aade077eSHeiko Stübner 
17e1bc64eeSSimon Glass /**
183513fb1eSPhilipp Tomsich  * back_to_bootrom() - return to bootrom (for TPL/SPL), passing a
193513fb1eSPhilipp Tomsich  *                     result code
203513fb1eSPhilipp Tomsich  *
213513fb1eSPhilipp Tomsich  * Transfer control back to the Rockchip BROM, restoring necessary
223513fb1eSPhilipp Tomsich  * register context and passing a command/result code to the BROM
233513fb1eSPhilipp Tomsich  * to instruct its next actions (e.g. continue boot sequence, enter
243513fb1eSPhilipp Tomsich  * download mode, ...).
253513fb1eSPhilipp Tomsich  *
263513fb1eSPhilipp Tomsich  * This function does not return.
2750b28820SPhilipp Tomsich  *
2850b28820SPhilipp Tomsich  * @brom_cmd: indicates how the bootrom should continue the boot
2950b28820SPhilipp Tomsich  *            sequence (e.g. load the next stage)
30aade077eSHeiko Stübner  */
313513fb1eSPhilipp Tomsich enum rockchip_bootrom_cmd {
323513fb1eSPhilipp Tomsich 	/*
333513fb1eSPhilipp Tomsich 	* These can not start at 0, as 0 has a special meaning
343513fb1eSPhilipp Tomsich 	* for setjmp().
353513fb1eSPhilipp Tomsich 	*/
363513fb1eSPhilipp Tomsich 
373513fb1eSPhilipp Tomsich 	BROM_BOOT_NEXTSTAGE = 1,  /* continue boot-sequence */
383513fb1eSPhilipp Tomsich 	BROM_BOOT_ENTER_DNL,      /* have BROM enter download-mode */
393513fb1eSPhilipp Tomsich };
403513fb1eSPhilipp Tomsich 
4150b28820SPhilipp Tomsich void back_to_bootrom(enum rockchip_bootrom_cmd brom_cmd);
425cf14c03SPhilipp Tomsich 
435cf14c03SPhilipp Tomsich /**
445cf14c03SPhilipp Tomsich  * Boot-device identifiers as used by the BROM
455cf14c03SPhilipp Tomsich  */
465cf14c03SPhilipp Tomsich enum {
47b7307f89SJason Zhu 	BROM_BOOTSOURCE_UNKNOWN = 0,
485cf14c03SPhilipp Tomsich 	BROM_BOOTSOURCE_NAND = 1,
495cf14c03SPhilipp Tomsich 	BROM_BOOTSOURCE_EMMC = 2,
505cf14c03SPhilipp Tomsich 	BROM_BOOTSOURCE_SPINOR = 3,
515cf14c03SPhilipp Tomsich 	BROM_BOOTSOURCE_SPINAND = 4,
525cf14c03SPhilipp Tomsich 	BROM_BOOTSOURCE_SD = 5,
53*b2b4c2f5SYifeng Zhao 	BROM_BOOTSOURCE_UFS = 7,
54b7307f89SJason Zhu 	BROM_BOOTSOURCE_I2C = 8,
55b7307f89SJason Zhu 	BROM_BOOTSOURCE_SPI = 9,
565cf14c03SPhilipp Tomsich 	BROM_BOOTSOURCE_USB = 10,
575cf14c03SPhilipp Tomsich 	BROM_LAST_BOOTSOURCE = BROM_BOOTSOURCE_USB
585cf14c03SPhilipp Tomsich };
595cf14c03SPhilipp Tomsich 
607a6ed8e8SKever Yang extern const char * const boot_devices[BROM_LAST_BOOTSOURCE + 1];
617a6ed8e8SKever Yang 
625cf14c03SPhilipp Tomsich /**
635cf14c03SPhilipp Tomsich  * Locations of the boot-device identifier in SRAM
645cf14c03SPhilipp Tomsich  */
652daa9732SKever Yang #define BROM_BOOTSOURCE_ID_ADDR (CONFIG_ROCKCHIP_IRAM_START_ADDR + 0x10)
66*b2b4c2f5SYifeng Zhao #define	BROM_BOOTSOURCE_MASK	0x0F
67*b2b4c2f5SYifeng Zhao #define	BROM_DOWNLOAD_MASK	0x80
685cf14c03SPhilipp Tomsich 
69aade077eSHeiko Stübner #endif
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