1cd324a6dSpekon gupta /* 2cd324a6dSpekon gupta * hardware.h 3cd324a6dSpekon gupta * 4cd324a6dSpekon gupta * hardware specific header 5cd324a6dSpekon gupta * 6cd324a6dSpekon gupta * Copyright (C) 2013, Texas Instruments, Incorporated - http://www.ti.com/ 7cd324a6dSpekon gupta * 8cd324a6dSpekon gupta * SPDX-License-Identifier: GPL-2.0+ 9cd324a6dSpekon gupta */ 10cd324a6dSpekon gupta 11cd324a6dSpekon gupta #ifndef __OMAP_HARDWARE_H 12cd324a6dSpekon gupta #define __OMAP_HARDWARE_H 13cd324a6dSpekon gupta 14cd324a6dSpekon gupta #include <asm/arch/omap.h> 15cd324a6dSpekon gupta 16cd324a6dSpekon gupta /* 17cd324a6dSpekon gupta * Common hardware definitions 18cd324a6dSpekon gupta */ 19cd324a6dSpekon gupta 20cd324a6dSpekon gupta /* BCH Error Location Module */ 21cd324a6dSpekon gupta #define ELM_BASE 0x48078000 22cd324a6dSpekon gupta 23cd324a6dSpekon gupta /* GPMC Base address */ 24cd324a6dSpekon gupta #define GPMC_BASE 0x50000000 25cd324a6dSpekon gupta 26fc5e2200SVignesh R /* EDMA3 Base address for DRA7XX and AM57XX */ 27*3891a54fSNishanth Menon #if defined(CONFIG_DRA7XX) 28fc5e2200SVignesh R #define EDMA3_BASE 0x43300000 29fc5e2200SVignesh R #endif 30fc5e2200SVignesh R 31cd324a6dSpekon gupta #endif 32