1d34efc76SSteve Sakoman /* 2d34efc76SSteve Sakoman * (C) Copyright 2010 3d34efc76SSteve Sakoman * Texas Instruments, <www.ti.com> 4d34efc76SSteve Sakoman * 5d34efc76SSteve Sakoman * This program is free software; you can redistribute it and/or 6d34efc76SSteve Sakoman * modify it under the terms of the GNU General Public License as 7d34efc76SSteve Sakoman * published by the Free Software Foundation; either version 2 of 8d34efc76SSteve Sakoman * the License, or (at your option) any later version. 9d34efc76SSteve Sakoman * 10d34efc76SSteve Sakoman * This program is distributed in the hope that it will be useful, 11d34efc76SSteve Sakoman * but WITHOUT ANY WARRANTY; without even the implied warranty of 12d34efc76SSteve Sakoman * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13d34efc76SSteve Sakoman * GNU General Public License for more details. 14d34efc76SSteve Sakoman * 15d34efc76SSteve Sakoman * You should have received a copy of the GNU General Public License 16d34efc76SSteve Sakoman * along with this program; if not, write to the Free Software 17d34efc76SSteve Sakoman * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 18d34efc76SSteve Sakoman * MA 02111-1307 USA 19d34efc76SSteve Sakoman */ 20d34efc76SSteve Sakoman 21d34efc76SSteve Sakoman #ifndef _SYS_PROTO_H_ 22d34efc76SSteve Sakoman #define _SYS_PROTO_H_ 23d34efc76SSteve Sakoman 24508a58faSSricharan #include <asm/arch/omap.h> 253776801dSAneesh V #include <asm/arch/clocks.h> 26d34efc76SSteve Sakoman #include <asm/io.h> 27d2f18c27SAneesh V #include <asm/omap_common.h> 28469ec1e3SAneesh V #include <asm/arch/mux_omap4.h> 29d34efc76SSteve Sakoman 30d34efc76SSteve Sakoman struct omap_sysinfo { 31d34efc76SSteve Sakoman char *board_string; 32d34efc76SSteve Sakoman }; 33d2f18c27SAneesh V extern const struct omap_sysinfo sysinfo; 34d34efc76SSteve Sakoman 3527952014SSteve Sakoman void gpmc_init(void); 36d34efc76SSteve Sakoman void watchdog_init(void); 37d34efc76SSteve Sakoman u32 get_device_type(void); 38469ec1e3SAneesh V void do_set_mux(u32 base, struct pad_conf_entry const *array, int size); 39508a58faSSricharan void set_muxconf_regs_essential(void); 40469ec1e3SAneesh V void set_muxconf_regs_non_essential(void); 410e7b6217SSteve Sakoman void sr32(void *, u32, u32, u32); 420e7b6217SSteve Sakoman u32 wait_on_value(u32, u32, void *, u32); 430e7b6217SSteve Sakoman void sdelay(unsigned long); 448b457fa8SAneesh V void set_pl310_ctrl_reg(u32 val); 45bcae7211SAneesh V void setup_clocks_for_console(void); 463776801dSAneesh V void prcm_init(void); 4701b753ffSSRICHARAN R void bypass_dpll(u32 const base); 483776801dSAneesh V void freq_update_core(void); 493776801dSAneesh V u32 get_sys_clk_freq(void); 503776801dSAneesh V u32 omap4_ddr_clk(void); 51095aea29SAneesh V void cancel_out(u32 *num, u32 *den, u32 den_limit); 522ae610f0SAneesh V void sdram_init(void); 53508a58faSSricharan u32 omap_sdram_size(void); 54508a58faSSricharan u32 cortex_rev(void); 55508a58faSSricharan void init_omap_revision(void); 56508a58faSSricharan void do_io_settings(void); 57a78274b2SNishanth Menon void omap_vc_init(u16 speed_khz); 58a78274b2SNishanth Menon int omap_vc_bypass_send_value(u8 sa, u8 reg_addr, u8 reg_data); 5970239507SLokesh Vutla u32 warm_reset(void); 6038f25b12SLokesh Vutla void force_emif_self_refresh(void); 61*0b1b60c7SLokesh Vutla void setup_warmreset_time(void); 6278f455c0SSricharan /* 6378f455c0SSricharan * This is used to verify if the configuration header 6478f455c0SSricharan * was executed by Romcode prior to control of transfer 6578f455c0SSricharan * to the bootloader. SPL is responsible for saving and 6678f455c0SSricharan * passing this to the u-boot. 6778f455c0SSricharan */ 6878f455c0SSricharan extern struct omap_boot_parameters boot_params; 69d34efc76SSteve Sakoman 70d2f18c27SAneesh V static inline u32 running_from_sdram(void) 71d2f18c27SAneesh V { 72d2f18c27SAneesh V u32 pc; 73d2f18c27SAneesh V asm volatile ("mov %0, pc" : "=r" (pc)); 74d2f18c27SAneesh V return ((pc >= OMAP44XX_DRAM_ADDR_SPACE_START) && 75d2f18c27SAneesh V (pc < OMAP44XX_DRAM_ADDR_SPACE_END)); 76d2f18c27SAneesh V } 77d2f18c27SAneesh V 78d2f18c27SAneesh V static inline u8 uboot_loaded_by_spl(void) 79d2f18c27SAneesh V { 80d2f18c27SAneesh V /* 8178f455c0SSricharan * u-boot can be running from sdram either because of configuration 8278f455c0SSricharan * Header or by SPL. If because of CH, then the romcode sets the 8378f455c0SSricharan * CHSETTINGS executed bit to true in the boot parameter structure that 8478f455c0SSricharan * it passes to the bootloader.This parameter is stored in the ch_flags 8578f455c0SSricharan * variable by both SPL and u-boot.Check out for CHSETTINGS, which is a 8678f455c0SSricharan * mandatory section if CH is present. 87d2f18c27SAneesh V */ 8878f455c0SSricharan if ((boot_params.ch_flags) & (CH_FLAGS_CHSETTINGS)) 8978f455c0SSricharan return 0; 9078f455c0SSricharan else 91d2f18c27SAneesh V return running_from_sdram(); 92d2f18c27SAneesh V } 93d2f18c27SAneesh V /* 94d2f18c27SAneesh V * The basic hardware init of OMAP(s_init()) can happen in 4 95d2f18c27SAneesh V * different contexts: 96d2f18c27SAneesh V * 1. SPL running from SRAM 97d2f18c27SAneesh V * 2. U-Boot running from FLASH 98d2f18c27SAneesh V * 3. Non-XIP U-Boot loaded to SDRAM by SPL 99d2f18c27SAneesh V * 4. Non-XIP U-Boot loaded to SDRAM by ROM code using the 100d2f18c27SAneesh V * Configuration Header feature 101d2f18c27SAneesh V * 102d2f18c27SAneesh V * This function finds this context. 103d2f18c27SAneesh V * Defining as inline may help in compiling out unused functions in SPL 104d2f18c27SAneesh V */ 105508a58faSSricharan static inline u32 omap_hw_init_context(void) 106d2f18c27SAneesh V { 107d2f18c27SAneesh V #ifdef CONFIG_SPL_BUILD 108d2f18c27SAneesh V return OMAP_INIT_CONTEXT_SPL; 109d2f18c27SAneesh V #else 110d2f18c27SAneesh V if (uboot_loaded_by_spl()) 111d2f18c27SAneesh V return OMAP_INIT_CONTEXT_UBOOT_AFTER_SPL; 112d2f18c27SAneesh V else if (running_from_sdram()) 113d2f18c27SAneesh V return OMAP_INIT_CONTEXT_UBOOT_AFTER_CH; 114d2f18c27SAneesh V else 115d2f18c27SAneesh V return OMAP_INIT_CONTEXT_UBOOT_FROM_NOR; 116d2f18c27SAneesh V #endif 117d2f18c27SAneesh V } 118d34efc76SSteve Sakoman 119d34efc76SSteve Sakoman #endif 120