13a0398d7SOtavio Salvador /* 26e829b67SOtavio Salvador * Freescale i.MX23/i.MX28 specific functions 33a0398d7SOtavio Salvador * 43a0398d7SOtavio Salvador * Copyright (C) 2011 Marek Vasut <marek.vasut@gmail.com> 53a0398d7SOtavio Salvador * on behalf of DENX Software Engineering GmbH 63a0398d7SOtavio Salvador * 71a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 83a0398d7SOtavio Salvador */ 93a0398d7SOtavio Salvador 10fc684e87SPeng Fan #ifndef __MXS_SYS_PROTO_H__ 11fc684e87SPeng Fan #define __MXS_SYS_PROTO_H__ 123a0398d7SOtavio Salvador 13*552a848eSStefano Babic #include <asm/mach-imx/sys_proto.h> 143a0398d7SOtavio Salvador 1590bc2bf2SMarek Vasut int mxsmmc_initialize(bd_t *bis, int id, int (*wp)(int), int (*cd)(int)); 163a0398d7SOtavio Salvador 173a0398d7SOtavio Salvador #ifdef CONFIG_SPL_BUILD 18180f47a8SOtavio Salvador 19180f47a8SOtavio Salvador #if defined(CONFIG_MX23) 20180f47a8SOtavio Salvador #include <asm/arch/iomux-mx23.h> 21180f47a8SOtavio Salvador #elif defined(CONFIG_MX28) 223a0398d7SOtavio Salvador #include <asm/arch/iomux-mx28.h> 23180f47a8SOtavio Salvador #endif 24180f47a8SOtavio Salvador 257b8657e2SMarek Vasut void mxs_common_spl_init(const uint32_t arg, const uint32_t *resptr, 267b8657e2SMarek Vasut const iomux_cfg_t *iomux_setup, 273a0398d7SOtavio Salvador const unsigned int iomux_size); 28fe21eaf9SMichael Heimpold 29fe21eaf9SMichael Heimpold void mxs_power_switch_dcdc_clocksource(uint32_t freqsel); 303a0398d7SOtavio Salvador #endif 313a0398d7SOtavio Salvador 32fa7a51cbSOtavio Salvador struct mxs_pair { 333a0398d7SOtavio Salvador uint8_t boot_pads; 343a0398d7SOtavio Salvador uint8_t boot_mask; 353a0398d7SOtavio Salvador const char *mode; 363a0398d7SOtavio Salvador }; 373a0398d7SOtavio Salvador 38fa7a51cbSOtavio Salvador static const struct mxs_pair mxs_boot_modes[] = { 39a8b2884dSOtavio Salvador #if defined(CONFIG_MX23) 40a8b2884dSOtavio Salvador { 0x00, 0x0f, "USB" }, 41a8b2884dSOtavio Salvador { 0x01, 0x1f, "I2C, master" }, 42a8b2884dSOtavio Salvador { 0x02, 0x1f, "SSP SPI #1, master, NOR" }, 43a8b2884dSOtavio Salvador { 0x03, 0x1f, "SSP SPI #2, master, NOR" }, 44a8b2884dSOtavio Salvador { 0x04, 0x1f, "NAND" }, 4577b0e223SMarek Vasut { 0x06, 0x1f, "JTAG" }, 46a8b2884dSOtavio Salvador { 0x08, 0x1f, "SSP SPI #3, master, EEPROM" }, 47a8b2884dSOtavio Salvador { 0x09, 0x1f, "SSP SD/MMC #0" }, 48a8b2884dSOtavio Salvador { 0x0a, 0x1f, "SSP SD/MMC #1" }, 49a8b2884dSOtavio Salvador { 0x00, 0x00, "Reserved/Unknown/Wrong" }, 50a8b2884dSOtavio Salvador #elif defined(CONFIG_MX28) 513a0398d7SOtavio Salvador { 0x00, 0x0f, "USB #0" }, 523a0398d7SOtavio Salvador { 0x01, 0x1f, "I2C #0, master, 3V3" }, 533a0398d7SOtavio Salvador { 0x11, 0x1f, "I2C #0, master, 1V8" }, 543a0398d7SOtavio Salvador { 0x02, 0x1f, "SSP SPI #2, master, 3V3 NOR" }, 553a0398d7SOtavio Salvador { 0x12, 0x1f, "SSP SPI #2, master, 1V8 NOR" }, 563a0398d7SOtavio Salvador { 0x03, 0x1f, "SSP SPI #3, master, 3V3 NOR" }, 573a0398d7SOtavio Salvador { 0x13, 0x1f, "SSP SPI #3, master, 1V8 NOR" }, 583a0398d7SOtavio Salvador { 0x04, 0x1f, "NAND, 3V3" }, 593a0398d7SOtavio Salvador { 0x14, 0x1f, "NAND, 1V8" }, 6077b0e223SMarek Vasut { 0x06, 0x1f, "JTAG" }, 613a0398d7SOtavio Salvador { 0x08, 0x1f, "SSP SPI #3, master, 3V3 EEPROM" }, 623a0398d7SOtavio Salvador { 0x18, 0x1f, "SSP SPI #3, master, 1V8 EEPROM" }, 633a0398d7SOtavio Salvador { 0x09, 0x1f, "SSP SD/MMC #0, 3V3" }, 643a0398d7SOtavio Salvador { 0x19, 0x1f, "SSP SD/MMC #0, 1V8" }, 653a0398d7SOtavio Salvador { 0x0a, 0x1f, "SSP SD/MMC #1, 3V3" }, 663a0398d7SOtavio Salvador { 0x1a, 0x1f, "SSP SD/MMC #1, 1V8" }, 673a0398d7SOtavio Salvador { 0x00, 0x00, "Reserved/Unknown/Wrong" }, 68a8b2884dSOtavio Salvador #endif 693a0398d7SOtavio Salvador }; 703a0398d7SOtavio Salvador 712d6286abSGraeme Russ #define MXS_BM_USB 0x00 722d6286abSGraeme Russ #define MXS_BM_I2C_MASTER_3V3 0x01 732d6286abSGraeme Russ #define MXS_BM_I2C_MASTER_1V8 0x11 742d6286abSGraeme Russ #define MXS_BM_SPI2_MASTER_3V3_NOR 0x02 752d6286abSGraeme Russ #define MXS_BM_SPI2_MASTER_1V8_NOR 0x12 762d6286abSGraeme Russ #define MXS_BM_SPI3_MASTER_3V3_NOR 0x03 772d6286abSGraeme Russ #define MXS_BM_SPI3_MASTER_1V8_NOR 0x13 782d6286abSGraeme Russ #define MXS_BM_NAND_3V3 0x04 792d6286abSGraeme Russ #define MXS_BM_NAND_1V8 0x14 802d6286abSGraeme Russ #define MXS_BM_JTAG 0x06 812d6286abSGraeme Russ #define MXS_BM_SPI3_MASTER_3V3_EEPROM 0x08 822d6286abSGraeme Russ #define MXS_BM_SPI3_MASTER_1V8_EEPROM 0x18 832d6286abSGraeme Russ #define MXS_BM_SDMMC0_3V3 0x09 842d6286abSGraeme Russ #define MXS_BM_SDMMC0_1V8 0x19 852d6286abSGraeme Russ #define MXS_BM_SDMMC1_3V3 0x0a 862d6286abSGraeme Russ #define MXS_BM_SDMMC1_1V8 0x1a 872d6286abSGraeme Russ 881e0cf5c3SOtavio Salvador struct mxs_spl_data { 893a0398d7SOtavio Salvador uint8_t boot_mode_idx; 903a0398d7SOtavio Salvador uint32_t mem_dram_size; 913a0398d7SOtavio Salvador }; 923a0398d7SOtavio Salvador 9372f8ebf1SOtavio Salvador int mxs_dram_init(void); 943a0398d7SOtavio Salvador 95fa7a51cbSOtavio Salvador #endif /* __SYS_PROTO_H__ */ 96