169041723SEric Nelson /* 269041723SEric Nelson * Copyright (C) 2013 Boundary Devices Inc. 369041723SEric Nelson * 4*1a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 569041723SEric Nelson */ 669041723SEric Nelson #ifndef __ASM_ARCH_MX6Q_DDR_H__ 769041723SEric Nelson #define __ASM_ARCH_MX6Q_DDR_H__ 869041723SEric Nelson 969041723SEric Nelson #ifndef CONFIG_MX6Q 1069041723SEric Nelson #error "wrong CPU" 1169041723SEric Nelson #endif 1269041723SEric Nelson 1369041723SEric Nelson #define MX6_IOM_DRAM_DQM0 0x020e05ac 1469041723SEric Nelson #define MX6_IOM_DRAM_DQM1 0x020e05b4 1569041723SEric Nelson #define MX6_IOM_DRAM_DQM2 0x020e0528 1669041723SEric Nelson #define MX6_IOM_DRAM_DQM3 0x020e0520 1769041723SEric Nelson #define MX6_IOM_DRAM_DQM4 0x020e0514 1869041723SEric Nelson #define MX6_IOM_DRAM_DQM5 0x020e0510 1969041723SEric Nelson #define MX6_IOM_DRAM_DQM6 0x020e05bc 2069041723SEric Nelson #define MX6_IOM_DRAM_DQM7 0x020e05c4 2169041723SEric Nelson 2269041723SEric Nelson #define MX6_IOM_DRAM_CAS 0x020e056c 2369041723SEric Nelson #define MX6_IOM_DRAM_RAS 0x020e0578 2469041723SEric Nelson #define MX6_IOM_DRAM_RESET 0x020e057c 2569041723SEric Nelson #define MX6_IOM_DRAM_SDCLK_0 0x020e0588 2669041723SEric Nelson #define MX6_IOM_DRAM_SDCLK_1 0x020e0594 2769041723SEric Nelson #define MX6_IOM_DRAM_SDBA2 0x020e058c 2869041723SEric Nelson #define MX6_IOM_DRAM_SDCKE0 0x020e0590 2969041723SEric Nelson #define MX6_IOM_DRAM_SDCKE1 0x020e0598 3069041723SEric Nelson #define MX6_IOM_DRAM_SDODT0 0x020e059c 3169041723SEric Nelson #define MX6_IOM_DRAM_SDODT1 0x020e05a0 3269041723SEric Nelson 3369041723SEric Nelson #define MX6_IOM_DRAM_SDQS0 0x020e05a8 3469041723SEric Nelson #define MX6_IOM_DRAM_SDQS1 0x020e05b0 3569041723SEric Nelson #define MX6_IOM_DRAM_SDQS2 0x020e0524 3669041723SEric Nelson #define MX6_IOM_DRAM_SDQS3 0x020e051c 3769041723SEric Nelson #define MX6_IOM_DRAM_SDQS4 0x020e0518 3869041723SEric Nelson #define MX6_IOM_DRAM_SDQS5 0x020e050c 3969041723SEric Nelson #define MX6_IOM_DRAM_SDQS6 0x020e05b8 4069041723SEric Nelson #define MX6_IOM_DRAM_SDQS7 0x020e05c0 4169041723SEric Nelson 4269041723SEric Nelson #define MX6_IOM_GRP_B0DS 0x020e0784 4369041723SEric Nelson #define MX6_IOM_GRP_B1DS 0x020e0788 4469041723SEric Nelson #define MX6_IOM_GRP_B2DS 0x020e0794 4569041723SEric Nelson #define MX6_IOM_GRP_B3DS 0x020e079c 4669041723SEric Nelson #define MX6_IOM_GRP_B4DS 0x020e07a0 4769041723SEric Nelson #define MX6_IOM_GRP_B5DS 0x020e07a4 4869041723SEric Nelson #define MX6_IOM_GRP_B6DS 0x020e07a8 4969041723SEric Nelson #define MX6_IOM_GRP_B7DS 0x020e0748 5069041723SEric Nelson #define MX6_IOM_GRP_ADDDS 0x020e074c 5169041723SEric Nelson #define MX6_IOM_DDRMODE_CTL 0x020e0750 5269041723SEric Nelson #define MX6_IOM_GRP_DDRPKE 0x020e0758 5369041723SEric Nelson #define MX6_IOM_GRP_DDRMODE 0x020e0774 5469041723SEric Nelson #define MX6_IOM_GRP_CTLDS 0x020e078c 5569041723SEric Nelson #define MX6_IOM_GRP_DDR_TYPE 0x020e0798 5669041723SEric Nelson 5769041723SEric Nelson #endif /*__ASM_ARCH_MX6Q_DDR_H__ */ 58