169041723SEric Nelson /* 269041723SEric Nelson * Copyright (C) 2013 Boundary Devices Inc. 369041723SEric Nelson * 4*1a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 569041723SEric Nelson */ 669041723SEric Nelson #ifndef __ASM_ARCH_MX6DLS_DDR_H__ 769041723SEric Nelson #define __ASM_ARCH_MX6DLS_DDR_H__ 869041723SEric Nelson 969041723SEric Nelson #ifndef CONFIG_MX6DL 1069041723SEric Nelson #ifndef CONFIG_MX6S 1169041723SEric Nelson #error "wrong CPU" 1269041723SEric Nelson #endif 1369041723SEric Nelson #endif 1469041723SEric Nelson 1569041723SEric Nelson #define MX6_IOM_DRAM_DQM0 0x020e0470 1669041723SEric Nelson #define MX6_IOM_DRAM_DQM1 0x020e0474 1769041723SEric Nelson #define MX6_IOM_DRAM_DQM2 0x020e0478 1869041723SEric Nelson #define MX6_IOM_DRAM_DQM3 0x020e047c 1969041723SEric Nelson #define MX6_IOM_DRAM_DQM4 0x020e0480 2069041723SEric Nelson #define MX6_IOM_DRAM_DQM5 0x020e0484 2169041723SEric Nelson #define MX6_IOM_DRAM_DQM6 0x020e0488 2269041723SEric Nelson #define MX6_IOM_DRAM_DQM7 0x020e048c 2369041723SEric Nelson 2469041723SEric Nelson #define MX6_IOM_DRAM_CAS 0x020e0464 2569041723SEric Nelson #define MX6_IOM_DRAM_RAS 0x020e0490 2669041723SEric Nelson #define MX6_IOM_DRAM_RESET 0x020e0494 2769041723SEric Nelson #define MX6_IOM_DRAM_SDCLK_0 0x020e04ac 2869041723SEric Nelson #define MX6_IOM_DRAM_SDCLK_1 0x020e04b0 2969041723SEric Nelson #define MX6_IOM_DRAM_SDBA2 0x020e04a0 3069041723SEric Nelson #define MX6_IOM_DRAM_SDCKE0 0x020e04a4 3169041723SEric Nelson #define MX6_IOM_DRAM_SDCKE1 0x020e04a8 3269041723SEric Nelson #define MX6_IOM_DRAM_SDODT0 0x020e04b4 3369041723SEric Nelson #define MX6_IOM_DRAM_SDODT1 0x020e04b8 3469041723SEric Nelson 3569041723SEric Nelson #define MX6_IOM_DRAM_SDQS0 0x020e04bc 3669041723SEric Nelson #define MX6_IOM_DRAM_SDQS1 0x020e04c0 3769041723SEric Nelson #define MX6_IOM_DRAM_SDQS2 0x020e04c4 3869041723SEric Nelson #define MX6_IOM_DRAM_SDQS3 0x020e04c8 3969041723SEric Nelson #define MX6_IOM_DRAM_SDQS4 0x020e04cc 4069041723SEric Nelson #define MX6_IOM_DRAM_SDQS5 0x020e04d0 4169041723SEric Nelson #define MX6_IOM_DRAM_SDQS6 0x020e04d4 4269041723SEric Nelson #define MX6_IOM_DRAM_SDQS7 0x020e04d8 4369041723SEric Nelson 4469041723SEric Nelson #define MX6_IOM_GRP_B0DS 0x020e0764 4569041723SEric Nelson #define MX6_IOM_GRP_B1DS 0x020e0770 4669041723SEric Nelson #define MX6_IOM_GRP_B2DS 0x020e0778 4769041723SEric Nelson #define MX6_IOM_GRP_B3DS 0x020e077c 4869041723SEric Nelson #define MX6_IOM_GRP_B4DS 0x020e0780 4969041723SEric Nelson #define MX6_IOM_GRP_B5DS 0x020e0784 5069041723SEric Nelson #define MX6_IOM_GRP_B6DS 0x020e078c 5169041723SEric Nelson #define MX6_IOM_GRP_B7DS 0x020e0748 5269041723SEric Nelson #define MX6_IOM_GRP_ADDDS 0x020e074c 5369041723SEric Nelson #define MX6_IOM_DDRMODE_CTL 0x020e0750 5469041723SEric Nelson #define MX6_IOM_GRP_DDRPKE 0x020e0754 5569041723SEric Nelson #define MX6_IOM_GRP_DDRMODE 0x020e0760 5669041723SEric Nelson #define MX6_IOM_GRP_CTLDS 0x020e076c 5769041723SEric Nelson #define MX6_IOM_GRP_DDR_TYPE 0x020e0774 5869041723SEric Nelson 5969041723SEric Nelson #endif /*__ASM_ARCH_MX6S_DDR_H__ */ 60