123608e23SJason Liu /* 223608e23SJason Liu * (C) Copyright 2009 323608e23SJason Liu * Stefano Babic, DENX Software Engineering, sbabic@denx.de. 423608e23SJason Liu * 51a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 623608e23SJason Liu */ 723608e23SJason Liu 823608e23SJason Liu #ifndef __ASM_ARCH_CLOCK_H 923608e23SJason Liu #define __ASM_ARCH_CLOCK_H 1023608e23SJason Liu 11833b6435SBenoît Thébaudeau #include <common.h> 12833b6435SBenoît Thébaudeau 13833b6435SBenoît Thébaudeau #ifdef CONFIG_SYS_MX6_HCLK 14833b6435SBenoît Thébaudeau #define MXC_HCLK CONFIG_SYS_MX6_HCLK 15833b6435SBenoît Thébaudeau #else 16833b6435SBenoît Thébaudeau #define MXC_HCLK 24000000 17833b6435SBenoît Thébaudeau #endif 18833b6435SBenoît Thébaudeau 19833b6435SBenoît Thébaudeau #ifdef CONFIG_SYS_MX6_CLK32 20833b6435SBenoît Thébaudeau #define MXC_CLK32 CONFIG_SYS_MX6_CLK32 21833b6435SBenoît Thébaudeau #else 22833b6435SBenoît Thébaudeau #define MXC_CLK32 32768 23833b6435SBenoît Thébaudeau #endif 24833b6435SBenoît Thébaudeau 2523608e23SJason Liu enum mxc_clock { 2623608e23SJason Liu MXC_ARM_CLK = 0, 2723608e23SJason Liu MXC_PER_CLK, 2823608e23SJason Liu MXC_AHB_CLK, 2923608e23SJason Liu MXC_IPG_CLK, 3023608e23SJason Liu MXC_IPG_PERCLK, 3123608e23SJason Liu MXC_UART_CLK, 3223608e23SJason Liu MXC_CSPI_CLK, 3323608e23SJason Liu MXC_AXI_CLK, 3423608e23SJason Liu MXC_EMI_SLOW_CLK, 3523608e23SJason Liu MXC_DDR_CLK, 3623608e23SJason Liu MXC_ESDHC_CLK, 3723608e23SJason Liu MXC_ESDHC2_CLK, 3823608e23SJason Liu MXC_ESDHC3_CLK, 3923608e23SJason Liu MXC_ESDHC4_CLK, 4023608e23SJason Liu MXC_SATA_CLK, 4123608e23SJason Liu MXC_NFC_CLK, 42e7bed5c2SMatthias Weisser MXC_I2C_CLK, 4323608e23SJason Liu }; 4423608e23SJason Liu 4590d7cc42SAkshay Bhat enum ldb_di_clock { 4690d7cc42SAkshay Bhat MXC_PLL5_CLK = 0, 4790d7cc42SAkshay Bhat MXC_PLL2_PFD0_CLK, 4890d7cc42SAkshay Bhat MXC_PLL2_PFD2_CLK, 4990d7cc42SAkshay Bhat MXC_MMDC_CH1_CLK, 5090d7cc42SAkshay Bhat MXC_PLL3_SW_CLK, 5190d7cc42SAkshay Bhat }; 5290d7cc42SAkshay Bhat 535f98d0b5SFabio Estevam enum enet_freq { 547731745cSStefan Roese ENET_25MHZ, 557731745cSStefan Roese ENET_50MHZ, 567731745cSStefan Roese ENET_100MHZ, 577731745cSStefan Roese ENET_125MHZ, 585f98d0b5SFabio Estevam }; 595f98d0b5SFabio Estevam 6023608e23SJason Liu u32 imx_get_uartclk(void); 6123608e23SJason Liu u32 imx_get_fecclk(void); 6223608e23SJason Liu unsigned int mxc_get_clock(enum mxc_clock clk); 63224beb83SNikita Kiryanov void setup_gpmi_io_clk(u32 cfg); 6436c1ca4dSNitin Garg void hab_caam_clock_enable(unsigned char enable); 65112fd2ecSBenoît Thébaudeau void enable_ocotp_clk(unsigned char enable); 663f467529SWolfgang Grandegger void enable_usboh3_clk(unsigned char enable); 67224beb83SNikita Kiryanov void enable_uart_clk(unsigned char enable); 68224beb83SNikita Kiryanov int enable_usdhc_clk(unsigned char enable, unsigned bus_num); 6964e7cdb5SEric Nelson int enable_sata_clock(void); 708d29cef5SNikita Kiryanov void disable_sata_clock(void); 7179814492SMarek Vasut int enable_pcie_clock(void); 72cc54a0f7STroy Kisky int enable_i2c_clk(unsigned char enable, unsigned i2c_num); 73a0ae0091SHeiko Schocher int enable_spi_clk(unsigned char enable, unsigned spi_num); 745ea7f0e3SPardeep Kumar Singla void enable_ipu_clock(void); 756d97dc10SPeng Fan int enable_fec_anatop_clock(int fec_id, enum enet_freq freq); 76224beb83SNikita Kiryanov void enable_enet_clk(unsigned char enable); 77*708f6927SPeng Fan int enable_lcdif_clock(u32 base_addr, bool enable); 78b93ab2eeSPeng Fan void enable_qspi_clk(int qspi_num); 79cf202d26SNitin Garg void enable_thermal_clk(void); 80ad153782SPeng Fan void mxs_set_lcdclk(u32 base_addr, u32 freq); 8190d7cc42SAkshay Bhat void select_ldb_di_clock_source(enum ldb_di_clock clk); 824db4d42eSLukasz Majewski void enable_eim_clk(unsigned char enable); 8323608e23SJason Liu #endif /* __ASM_ARCH_CLOCK_H */ 84