152f69f81SVladimir Zapolskiy /* 252f69f81SVladimir Zapolskiy * Copyright (C) 2011 by Vladimir Zapolskiy <vz@mleia.com> 352f69f81SVladimir Zapolskiy * 4*1a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 552f69f81SVladimir Zapolskiy */ 652f69f81SVladimir Zapolskiy 752f69f81SVladimir Zapolskiy #ifndef _LPC32XX_WDT_H 852f69f81SVladimir Zapolskiy #define _LPC32XX_WDT_H 952f69f81SVladimir Zapolskiy 1052f69f81SVladimir Zapolskiy #include <asm/types.h> 1152f69f81SVladimir Zapolskiy 1252f69f81SVladimir Zapolskiy /* Watchdog Timer Registers */ 1352f69f81SVladimir Zapolskiy struct wdt_regs { 1452f69f81SVladimir Zapolskiy u32 isr; /* Interrupt Status Register */ 1552f69f81SVladimir Zapolskiy u32 ctrl; /* Control Register */ 1652f69f81SVladimir Zapolskiy u32 counter; /* Counter Value Register */ 1752f69f81SVladimir Zapolskiy u32 mctrl; /* Match Control Register */ 1852f69f81SVladimir Zapolskiy u32 match0; /* Match 0 Register */ 1952f69f81SVladimir Zapolskiy u32 emr; /* External Match Control Register */ 2052f69f81SVladimir Zapolskiy u32 pulse; /* Reset Pulse Length Register */ 2152f69f81SVladimir Zapolskiy u32 res; /* Reset Source Register */ 2252f69f81SVladimir Zapolskiy }; 2352f69f81SVladimir Zapolskiy 2452f69f81SVladimir Zapolskiy /* Watchdog Timer Control Register bits */ 2552f69f81SVladimir Zapolskiy #define WDTIM_CTRL_PAUSE_EN (1 << 2) 2652f69f81SVladimir Zapolskiy #define WDTIM_CTRL_RESET_COUNT (1 << 1) 2752f69f81SVladimir Zapolskiy #define WDTIM_CTRL_COUNT_ENAB (1 << 0) 2852f69f81SVladimir Zapolskiy 2952f69f81SVladimir Zapolskiy /* Watchdog Timer Match Control Register bits */ 3052f69f81SVladimir Zapolskiy #define WDTIM_MCTRL_RESFRC2 (1 << 6) 3152f69f81SVladimir Zapolskiy #define WDTIM_MCTRL_RESFRC1 (1 << 5) 3252f69f81SVladimir Zapolskiy #define WDTIM_MCTRL_M_RES2 (1 << 4) 3352f69f81SVladimir Zapolskiy #define WDTIM_MCTRL_M_RES1 (1 << 3) 3452f69f81SVladimir Zapolskiy #define WDTIM_MCTRL_STOP_COUNT0 (1 << 2) 3552f69f81SVladimir Zapolskiy #define WDTIM_MCTRL_RESET_COUNT0 (1 << 1) 3652f69f81SVladimir Zapolskiy #define WDTIM_MCTRL_MR0_INT (1 << 0) 3752f69f81SVladimir Zapolskiy 3852f69f81SVladimir Zapolskiy #endif /* _LPC32XX_WDT_H */ 39