1*52f69f81SVladimir Zapolskiy /* 2*52f69f81SVladimir Zapolskiy * Copyright (C) 2011 by Vladimir Zapolskiy <vz@mleia.com> 3*52f69f81SVladimir Zapolskiy * 4*52f69f81SVladimir Zapolskiy * This program is free software; you can redistribute it and/or 5*52f69f81SVladimir Zapolskiy * modify it under the terms of the GNU General Public License 6*52f69f81SVladimir Zapolskiy * as published by the Free Software Foundation; either version 2 7*52f69f81SVladimir Zapolskiy * of the License, or (at your option) any later version. 8*52f69f81SVladimir Zapolskiy * 9*52f69f81SVladimir Zapolskiy * This program is distributed in the hope that it will be useful, 10*52f69f81SVladimir Zapolskiy * but WITHOUT ANY WARRANTY; without even the implied warranty of 11*52f69f81SVladimir Zapolskiy * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12*52f69f81SVladimir Zapolskiy * GNU General Public License for more details. 13*52f69f81SVladimir Zapolskiy * 14*52f69f81SVladimir Zapolskiy * You should have received a copy of the GNU General Public License 15*52f69f81SVladimir Zapolskiy * along with this program; if not, write to the Free Software 16*52f69f81SVladimir Zapolskiy * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, 17*52f69f81SVladimir Zapolskiy * MA 02110-1301, USA. 18*52f69f81SVladimir Zapolskiy */ 19*52f69f81SVladimir Zapolskiy 20*52f69f81SVladimir Zapolskiy #ifndef _LPC32XX_UART_H 21*52f69f81SVladimir Zapolskiy #define _LPC32XX_UART_H 22*52f69f81SVladimir Zapolskiy 23*52f69f81SVladimir Zapolskiy #include <asm/types.h> 24*52f69f81SVladimir Zapolskiy 25*52f69f81SVladimir Zapolskiy /* UART Control Registers */ 26*52f69f81SVladimir Zapolskiy struct uart_ctrl_regs { 27*52f69f81SVladimir Zapolskiy u32 ctrl; /* Control Register */ 28*52f69f81SVladimir Zapolskiy u32 clkmode; /* Clock Mode Register */ 29*52f69f81SVladimir Zapolskiy u32 loop; /* Loopback Control Register */ 30*52f69f81SVladimir Zapolskiy }; 31*52f69f81SVladimir Zapolskiy 32*52f69f81SVladimir Zapolskiy /* UART Control Register bits */ 33*52f69f81SVladimir Zapolskiy #define UART_CTRL_UART3_MD_CTRL (1 << 11) 34*52f69f81SVladimir Zapolskiy #define UART_CTRL_HDPX_INV (1 << 10) 35*52f69f81SVladimir Zapolskiy #define UART_CTRL_HDPX_EN (1 << 9) 36*52f69f81SVladimir Zapolskiy #define UART_CTRL_UART6_IRDA (1 << 5) 37*52f69f81SVladimir Zapolskiy #define UART_CTRL_IR_TX6_INV (1 << 4) 38*52f69f81SVladimir Zapolskiy #define UART_CTRL_IR_RX6_INV (1 << 3) 39*52f69f81SVladimir Zapolskiy #define UART_CTRL_IR_RX_LENGTH (1 << 2) 40*52f69f81SVladimir Zapolskiy #define UART_CTRL_IR_TX_LENGTH (1 << 1) 41*52f69f81SVladimir Zapolskiy #define UART_CTRL_UART5_USB_MODE (1 << 0) 42*52f69f81SVladimir Zapolskiy 43*52f69f81SVladimir Zapolskiy /* UART Clock Mode Register bits */ 44*52f69f81SVladimir Zapolskiy #define UART_CLKMODE_STATX(n) (1 << ((n) + 16)) 45*52f69f81SVladimir Zapolskiy #define UART_CLKMODE_STAT (1 << 14) 46*52f69f81SVladimir Zapolskiy #define UART_CLKMODE_MASK(n) (0x3 << (2 * (n) - 2)) 47*52f69f81SVladimir Zapolskiy #define UART_CLKMODE_AUTO(n) (0x2 << (2 * (n) - 2)) 48*52f69f81SVladimir Zapolskiy #define UART_CLKMODE_ON(n) (0x1 << (2 * (n) - 2)) 49*52f69f81SVladimir Zapolskiy #define UART_CLKMODE_OFF(n) (0x0 << (2 * (n) - 2)) 50*52f69f81SVladimir Zapolskiy 51*52f69f81SVladimir Zapolskiy /* UART Loopback Control Register bits */ 52*52f69f81SVladimir Zapolskiy #define UART_LOOPBACK(n) (1 << ((n) - 1)) 53*52f69f81SVladimir Zapolskiy 54*52f69f81SVladimir Zapolskiy #endif /* _LPC32XX_UART_H */ 55