108c5130dSBharat Bhushan /* 208c5130dSBharat Bhushan * Copyright 2014 Freescale Semiconductor, Inc. 308c5130dSBharat Bhushan * 408c5130dSBharat Bhushan * SPDX-License-Identifier: GPL-2.0+ 508c5130dSBharat Bhushan * 608c5130dSBharat Bhushan */ 708c5130dSBharat Bhushan #ifndef __FSL_STREAM_ID_H 808c5130dSBharat Bhushan #define __FSL_STREAM_ID_H 908c5130dSBharat Bhushan 1008c5130dSBharat Bhushan /* 11*a4954f94SBharat Bhushan * Stream IDs on NXP Chassis-3 (for example ls2080a, ls1088a, ls2088a) 12*a4954f94SBharat Bhushan * devices are not hardwired and are programmed by sw. There are a limited 13*a4954f94SBharat Bhushan * number of stream IDs available, and the partitioning of them is scenario 14*a4954f94SBharat Bhushan * dependent. This header defines the partitioning between legacy, 15*a4954f94SBharat Bhushan * PCI, and DPAA2 devices. 1608c5130dSBharat Bhushan * 1708c5130dSBharat Bhushan * This partitioning can be customized in this file depending 1808c5130dSBharat Bhushan * on the specific hardware config: 1908c5130dSBharat Bhushan * 2008c5130dSBharat Bhushan * -non-PCI legacy, platform devices (USB, SD/MMC, SATA, DMA) 2108c5130dSBharat Bhushan * -all legacy devices get a unique stream ID assigned and programmed in 2208c5130dSBharat Bhushan * their AMQR registers by u-boot 2308c5130dSBharat Bhushan * 2408c5130dSBharat Bhushan * -PCIe 2508c5130dSBharat Bhushan * -there is a range of stream IDs set aside for PCI in this 2608c5130dSBharat Bhushan * file. U-boot will scan the PCI bus and for each device discovered: 2708c5130dSBharat Bhushan * -allocate a streamID 2808c5130dSBharat Bhushan * -set a PEXn LUT table entry mapping 'requester ID' to 'stream ID' 2908c5130dSBharat Bhushan * -set a msi-map entry in the PEXn controller node in the 3008c5130dSBharat Bhushan * device tree (see Documentation/devicetree/bindings/pci/pci-msi.txt 3108c5130dSBharat Bhushan * for more info on the msi-map definition) 32*a4954f94SBharat Bhushan * -set a iommu-map entry in the PEXn controller node in the 33*a4954f94SBharat Bhushan * device tree (see Documentation/devicetree/bindings/pci/pci-iommu.txt 34*a4954f94SBharat Bhushan * for more info on the iommu-map definition) 3508c5130dSBharat Bhushan * 3608c5130dSBharat Bhushan * -DPAA2 3708c5130dSBharat Bhushan * -u-boot will allocate a range of stream IDs to be used by the Management 3808c5130dSBharat Bhushan * Complex for containers and will set these values in the MC DPC image. 3908c5130dSBharat Bhushan * -the MC is responsible for allocating and setting up 'isolation context 4008c5130dSBharat Bhushan * IDs (ICIDs) based on the allocated stream IDs for all DPAA2 devices. 4108c5130dSBharat Bhushan * 42*a4954f94SBharat Bhushan * On Chasis-3 SoCs stream IDs are programmed in AMQ registers (32-bits) for 4308c5130dSBharat Bhushan * each of the different bus masters. The relationship between 4408c5130dSBharat Bhushan * the AMQ registers and stream IDs is defined in the table below: 4508c5130dSBharat Bhushan * AMQ bit streamID bit 4608c5130dSBharat Bhushan * --------------------------- 4708c5130dSBharat Bhushan * PL[18] 9 // privilege bit 4808c5130dSBharat Bhushan * BMT[17] 8 // bypass translation 4908c5130dSBharat Bhushan * VA[16] 7 // reserved 5008c5130dSBharat Bhushan * [15] - // unused 5108c5130dSBharat Bhushan * ICID[14:7] - // unused 5208c5130dSBharat Bhushan * ICID[6:0] 6-0 // isolation context id 5308c5130dSBharat Bhushan * ---------------------------- 5408c5130dSBharat Bhushan * 5508c5130dSBharat Bhushan */ 5608c5130dSBharat Bhushan 5708c5130dSBharat Bhushan #define AMQ_PL_MASK (0x1 << 18) /* priviledge bit */ 5808c5130dSBharat Bhushan #define AMQ_BMT_MASK (0x1 << 17) /* bypass bit */ 5908c5130dSBharat Bhushan 6008c5130dSBharat Bhushan #define FSL_INVALID_STREAM_ID 0 6108c5130dSBharat Bhushan 6208c5130dSBharat Bhushan #define FSL_BYPASS_AMQ (AMQ_PL_MASK | AMQ_BMT_MASK) 6308c5130dSBharat Bhushan 6408c5130dSBharat Bhushan /* legacy devices */ 6508c5130dSBharat Bhushan #define FSL_USB1_STREAM_ID 1 6608c5130dSBharat Bhushan #define FSL_USB2_STREAM_ID 2 6708c5130dSBharat Bhushan #define FSL_SDMMC_STREAM_ID 3 6808c5130dSBharat Bhushan #define FSL_SATA1_STREAM_ID 4 6908c5130dSBharat Bhushan #define FSL_SATA2_STREAM_ID 5 7008c5130dSBharat Bhushan #define FSL_DMA_STREAM_ID 6 7108c5130dSBharat Bhushan 7208c5130dSBharat Bhushan /* PCI - programmed in PEXn_LUT */ 7308c5130dSBharat Bhushan #define FSL_PEX_STREAM_ID_START 7 7408c5130dSBharat Bhushan #define FSL_PEX_STREAM_ID_END 22 7508c5130dSBharat Bhushan 7608c5130dSBharat Bhushan /* DPAA2 - set in MC DPC and alloced by MC */ 7708c5130dSBharat Bhushan #define FSL_DPAA2_STREAM_ID_START 23 7808c5130dSBharat Bhushan #define FSL_DPAA2_STREAM_ID_END 63 7908c5130dSBharat Bhushan 8008c5130dSBharat Bhushan #endif 81