1ce089c04SPrafulla Wadaskar /* 2ce089c04SPrafulla Wadaskar * Based on linux/arch/arm/mach-mpp/include/mfp-pxa168.h 3ce089c04SPrafulla Wadaskar * (C) Copyright 2007 4ce089c04SPrafulla Wadaskar * Marvell Semiconductor <www.marvell.com> 5ce089c04SPrafulla Wadaskar * 2007-08-21: eric miao <eric.miao@marvell.com> 6ce089c04SPrafulla Wadaskar * 7ce089c04SPrafulla Wadaskar * (C) Copyright 2010 8ce089c04SPrafulla Wadaskar * Marvell Semiconductor <www.marvell.com> 9ce089c04SPrafulla Wadaskar * Written-by: Prafulla Wadaskar <prafulla@marvell.com> 10ce089c04SPrafulla Wadaskar * Contributor: Mahavir Jain <mjain@marvell.com> 11ce089c04SPrafulla Wadaskar * 12ce089c04SPrafulla Wadaskar * See file CREDITS for list of people who contributed to this 13ce089c04SPrafulla Wadaskar * project. 14ce089c04SPrafulla Wadaskar * 15ce089c04SPrafulla Wadaskar * This program is free software; you can redistribute it and/or 16ce089c04SPrafulla Wadaskar * modify it under the terms of the GNU General Public License as 17ce089c04SPrafulla Wadaskar * published by the Free Software Foundation; either version 2 of 18ce089c04SPrafulla Wadaskar * the License, or (at your option) any later version. 19ce089c04SPrafulla Wadaskar * 20ce089c04SPrafulla Wadaskar * This program is distributed in the hope that it will be useful, 21ce089c04SPrafulla Wadaskar * but WITHOUT ANY WARRANTY; without even the implied warranty of 22ce089c04SPrafulla Wadaskar * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 23ce089c04SPrafulla Wadaskar * GNU General Public License for more details. 24ce089c04SPrafulla Wadaskar * 25ce089c04SPrafulla Wadaskar * You should have received a copy of the GNU General Public License 26ce089c04SPrafulla Wadaskar * along with this program; if not, write to the Free Software 27ce089c04SPrafulla Wadaskar * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, 28ce089c04SPrafulla Wadaskar * MA 02110-1301 USA 29ce089c04SPrafulla Wadaskar */ 30ce089c04SPrafulla Wadaskar 31ce089c04SPrafulla Wadaskar #ifndef __ARMADA100_MFP_H 32ce089c04SPrafulla Wadaskar #define __ARMADA100_MFP_H 33ce089c04SPrafulla Wadaskar 34ce089c04SPrafulla Wadaskar /* 35ce089c04SPrafulla Wadaskar * Frequently used MFP Configuration macros for all ARMADA100 family of SoCs 36ce089c04SPrafulla Wadaskar * 37ce089c04SPrafulla Wadaskar * offset, pull,pF, drv,dF, edge,eF ,afn,aF 38ce089c04SPrafulla Wadaskar */ 39ce089c04SPrafulla Wadaskar /* UART1 */ 4081a9ab21SLei Wen #define MFP107_UART1_TXD (MFP_REG(0x01ac) | MFP_AF1 | MFP_DRIVE_FAST) 4181a9ab21SLei Wen #define MFP107_UART1_RXD (MFP_REG(0x01ac) | MFP_AF2 | MFP_DRIVE_FAST) 4281a9ab21SLei Wen #define MFP108_UART1_RXD (MFP_REG(0x01b0) | MFP_AF1 | MFP_DRIVE_FAST) 4381a9ab21SLei Wen #define MFP108_UART1_TXD (MFP_REG(0x01b0) | MFP_AF2 | MFP_DRIVE_FAST) 4481a9ab21SLei Wen #define MFP109_UART1_CTS (MFP_REG(0x01b4) | MFP_AF1 | MFP_DRIVE_MEDIUM) 4581a9ab21SLei Wen #define MFP109_UART1_RTS (MFP_REG(0x01b4) | MFP_AF2 | MFP_DRIVE_MEDIUM) 4681a9ab21SLei Wen #define MFP110_UART1_RTS (MFP_REG(0x01b8) | MFP_AF1 | MFP_DRIVE_MEDIUM) 4781a9ab21SLei Wen #define MFP110_UART1_CTS (MFP_REG(0x01b8) | MFP_AF2 | MFP_DRIVE_MEDIUM) 4881a9ab21SLei Wen #define MFP111_UART1_RI (MFP_REG(0x01bc) | MFP_AF1 | MFP_DRIVE_MEDIUM) 4981a9ab21SLei Wen #define MFP111_UART1_DSR (MFP_REG(0x01bc) | MFP_AF2 | MFP_DRIVE_MEDIUM) 5081a9ab21SLei Wen #define MFP112_UART1_DTR (MFP_REG(0x01c0) | MFP_AF1 | MFP_DRIVE_MEDIUM) 5181a9ab21SLei Wen #define MFP112_UART1_DCD (MFP_REG(0x01c0) | MFP_AF2 | MFP_DRIVE_MEDIUM) 52ce089c04SPrafulla Wadaskar 53ce089c04SPrafulla Wadaskar /* UART2 */ 5481a9ab21SLei Wen #define MFP47_UART2_RXD (MFP_REG(0x0028) | MFP_AF6 | MFP_DRIVE_MEDIUM) 5581a9ab21SLei Wen #define MFP48_UART2_TXD (MFP_REG(0x002c) | MFP_AF6 | MFP_DRIVE_MEDIUM) 5681a9ab21SLei Wen #define MFP88_UART2_RXD (MFP_REG(0x0160) | MFP_AF2 | MFP_DRIVE_MEDIUM) 5781a9ab21SLei Wen #define MFP89_UART2_TXD (MFP_REG(0x0164) | MFP_AF2 | MFP_DRIVE_MEDIUM) 58ce089c04SPrafulla Wadaskar 59ce089c04SPrafulla Wadaskar /* UART3 */ 6082b13f73SAjay Bhargav #define MFPO8_UART3_TXD (MFP_REG(0x06c) | MFP_AF2 | MFP_DRIVE_MEDIUM) 6182b13f73SAjay Bhargav #define MFPO9_UART3_RXD (MFP_REG(0x070) | MFP_AF2 | MFP_DRIVE_MEDIUM) 6281a9ab21SLei Wen 6381a9ab21SLei Wen /* I2c */ 6481a9ab21SLei Wen #define MFP105_CI2C_SDA (MFP_REG(0x1a4) | MFP_AF1 | MFP_DRIVE_MEDIUM) 6581a9ab21SLei Wen #define MFP106_CI2C_SCL (MFP_REG(0x1a8) | MFP_AF1 | MFP_DRIVE_MEDIUM) 66ce089c04SPrafulla Wadaskar 67*aa0ecfebSAjay Bhargav /* Fast Ethernet */ 68*aa0ecfebSAjay Bhargav #define MFP086_ETH_TXCLK (MFP_REG(0x158) | MFP_AF5 | MFP_DRIVE_MEDIUM) 69*aa0ecfebSAjay Bhargav #define MFP087_ETH_TXEN (MFP_REG(0x15C) | MFP_AF5 | MFP_DRIVE_MEDIUM) 70*aa0ecfebSAjay Bhargav #define MFP088_ETH_TXDQ3 (MFP_REG(0x160) | MFP_AF5 | MFP_DRIVE_MEDIUM) 71*aa0ecfebSAjay Bhargav #define MFP089_ETH_TXDQ2 (MFP_REG(0x164) | MFP_AF5 | MFP_DRIVE_MEDIUM) 72*aa0ecfebSAjay Bhargav #define MFP090_ETH_TXDQ1 (MFP_REG(0x168) | MFP_AF5 | MFP_DRIVE_MEDIUM) 73*aa0ecfebSAjay Bhargav #define MFP091_ETH_TXDQ0 (MFP_REG(0x16C) | MFP_AF5 | MFP_DRIVE_MEDIUM) 74*aa0ecfebSAjay Bhargav #define MFP092_ETH_CRS (MFP_REG(0x170) | MFP_AF5 | MFP_DRIVE_MEDIUM) 75*aa0ecfebSAjay Bhargav #define MFP093_ETH_COL (MFP_REG(0x174) | MFP_AF5 | MFP_DRIVE_MEDIUM) 76*aa0ecfebSAjay Bhargav #define MFP094_ETH_RXCLK (MFP_REG(0x178) | MFP_AF5 | MFP_DRIVE_MEDIUM) 77*aa0ecfebSAjay Bhargav #define MFP095_ETH_RXER (MFP_REG(0x17C) | MFP_AF5 | MFP_DRIVE_MEDIUM) 78*aa0ecfebSAjay Bhargav #define MFP096_ETH_RXDQ3 (MFP_REG(0x180) | MFP_AF5 | MFP_DRIVE_MEDIUM) 79*aa0ecfebSAjay Bhargav #define MFP097_ETH_RXDQ2 (MFP_REG(0x184) | MFP_AF5 | MFP_DRIVE_MEDIUM) 80*aa0ecfebSAjay Bhargav #define MFP098_ETH_RXDQ1 (MFP_REG(0x188) | MFP_AF5 | MFP_DRIVE_MEDIUM) 81*aa0ecfebSAjay Bhargav #define MFP099_ETH_RXDQ0 (MFP_REG(0x18C) | MFP_AF5 | MFP_DRIVE_MEDIUM) 82*aa0ecfebSAjay Bhargav #define MFP100_ETH_MDC (MFP_REG(0x190) | MFP_AF5 | MFP_DRIVE_MEDIUM) 83*aa0ecfebSAjay Bhargav #define MFP101_ETH_MDIO (MFP_REG(0x194) | MFP_AF5 | MFP_DRIVE_MEDIUM) 84*aa0ecfebSAjay Bhargav #define MFP103_ETH_RXDV (MFP_REG(0x19C) | MFP_AF5 | MFP_DRIVE_MEDIUM) 85*aa0ecfebSAjay Bhargav 86ce089c04SPrafulla Wadaskar /* More macros can be defined here... */ 87ce089c04SPrafulla Wadaskar 88ce089c04SPrafulla Wadaskar #define MFP_PIN_MAX 117 89ce089c04SPrafulla Wadaskar 90ce089c04SPrafulla Wadaskar #endif /* __ARMADA100_MFP_H */ 91